MSP430F5529 and USB:
We are building a custom board with the '5529. It uses a 32 kHz Xtal FLL'd up to 8 MHz for the MCLK and divided by 2 (4 MHz) for the SMCLK. We've designed the USB Clock to use the SMCLK, routed externally from the SMCLK output to the XT2 input in "BYPASS" mode. (The XT2 is not used on the '5529 for purposes other than the USB - obviously, we were trying to avoid adding a second crystal to the board)
Two items: First: we realize this technique of input of the XT2 Clock for USB purposes has been previously discussed on this forum sometime ago. The conclusion, as I recall, was that this technique is "legal, but will add noise to the board." Agree, but we are willing to live with that. Second, we now realize that using the 32 kHz Xtal generates an out of spec case for the USB 48 MHz clock, almost double the spec for tolerance on the USB 48 MHz clock. I'll add more about this below.
Now the issue: When executing the USB code from the latest (3.11.00 USB Developers Package) at full MCLK speed, "Bus Errors" occur. However, they do not occur if the USB code is single-stepped (using the IAR compiler/IDE). The "Bus Error" occurs in the USB_Reset code. The error occurs during the initialization phase of the USB, before any hand-shaking with the host. At this point, the '5529 is alway in "Active Mode."
We are now willing to add the XT2 xtal, rather than routing the SMCLK externally, to solve the out-of-spec USB 48 MHz clock. However, we're not convinced that this will solve the "Bus Error" issue because we don't believe the 48 MHz is used at this time (???). We don't wish to commit to a new iteration of the board until we know there are not other issues that would cause the "Bus Error" problem.
Any help on the reason for the "Bus Errors"?
thanks,
jdata
