flash reprogramming by copying into RAM

With the exception of block-write and erase-all, there is no need to execute from RAM.

If you want to use c to copy code to RAM and excute it, you need to specify which c-compiler you are using. And sometimes which version. (c is portable as long as you use the same version from the same vender with the same settings. ;-)

Hey old_cow_yellow,

thanks for replying. But i actually don't understand what you mean.
In the datasheet there are two options for using the flash-memory:

1. Or you say that the CPU works in idle-state. That's owkey but the problem is then
that the CPU doesn't respond on external interrupts anymore. And that's not what i want

2. Use the flash memory for writing data away and use the RAM for executing code in the meanwhile.

So actuall, what you said is that you don't need the RAM only with the exception of block-writes and erase-all. Sounds logic but i think that you then forgot to mention the state where the CPU still has to react on external interrupt which i want.

And any C-code would be very helpfull because the porting is not the biggest problem for me. I only needs to know if i have to copy the program by myself into the RAM or that i happens automatically when i set the right bits in the right registers?

Kind Regards

Dries

You said: "... i think that you then forgot to mention the state where the CPU still has to react on external interrupt which i want".

The TI Application Note slaa103.pdf you referenced was for MSP430F1xx only. During Flash erase/write operation, F1xx chips simply cannot handle interrupt. That is why they tell you that you have to disable the Watchdog and all interrupts and restore them after the operation is done. This has nothing to do with whether you run the code in RAM or Flash.

Some (but not all) of the newer F2xx and F4xx chips have a new feature in the Flash controller. There is a bit called EEI inside the FCTL1 register. If that bit is set and an interrupt requests service during the erase/write Flash operation, that operation will be suspended. The Flash will be back in normal operation mode to allow access the Interrupt Vector (at 0xFFE0 to 0xFFFF in Flash) which points to the ISR. You need to check the data-sheet of the chip you are using to find out if this feature is supported. If so, you need to check the errata of the silicon version you are using to find out if there is any silicon error and workaround. Again, this has nothing to do with whether the code is in RAM or Flash. The Interrupt Vector for all these chips are always in Flash.

F5xx is another story. I have not investigated the details yet.

If I were to use the Flash to log data, I would erase the Flash intended for the log ahead of time. Whenever I have a word to log, I would disable interrupts, write that word, and re-enable the interrupts. During that sequence, any incoming interrupt will not be acknowledged until the interrupts are re-enabled. Thus I may have introduced a latency of a few hundreds of microseconds (the duration of that sequence to write a word). I think the EEI feature might be able to reduce that interrupt latency. But I have my doubts.

As for running code in RAM so that the CPU can do something else while the Flash is in erase/write mode. Yes, it can be done. All you need is have the code in RAM and have PC pointing to that code.

driesione said:

And any C-code would be very helpfull because the porting is not the biggest problem for me. I only needs to know if i have to copy the program by myself into the RAM or that i happens automatically when i set the right bits in the right registers?

The copying of program from flash to RAM and then running from RAM does not happen automatically.  You will need to develop some code to implement this.

In my younger days, compiled and linked object code is always copied into RAM and then running from RAM.

May be we could use earlier versions of c-compiler and add:

#define DECTAPE FLASH

Hi all,

thanks for the usefull posts. But if i understand old_cow_yellow good, it's no possible to make an interrupt while the CPU is erase/write into flash. This because all the interrupt-vectors are in the flashmemory and not in the RAM? Correct?

That's maybe why the datasheet also says that for triggering an interrupt on the RX-UART, you cannot simply use the interrupt vector but you have to poll constantly for it?

Best Regards,

Dries