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Pull-up resistor values for SBWTDIO

Clark Scheff
Prodigy 100 points

I was wondering if there is a document that references the acceptable values for the pull-up resistor on the SBWTDIO line.   I'm working on a board design that is using the MSPF2011 and I'd like to know what values, besides 47k, can be used for the Spy-Bi-Wire interface.  Since this is for a job, an actual document that specifies this information would be ideal.

 

Thanks in advance,
Clark Scheff

  • 0
    TI__Guru 70612 points

    Clark,

    what is the reason you want to deviate from the recommended value? Is it that you want to reduce the number of different components?

    Based on experience I would not recommend deviating from the recommended value, which is the only "documented" value. This applies to both the pull-up R (47K), and the maximum allowed capacitive load for this device (<=2.2nF). The reason is that in case of debugging, there is bi-directional high-speed communication on this line, and any deviations from the recommendation might affect the debugger's capability to reliably communicate with the device / or to be able to communicate as well. Obviously all this is dependent on the entire "system" which includes not only the R and C, but also the frequency on SBWTDIO as well as the drive capabilities both on the 430 side but also on the JTAG debugger side. Also, note that this RC is also responsible to generate some power-up reset delay, as well as to keep noise away from the device's reset pin (at least to a certain degree).

    Regards,
    Andre

  • 0 in reply to Andreas Dannenberg
    Prodigy 100 points

    Hi Andre,

    I personally did not want to deviate from the recommended value but the EE putting all the schematics together had changed the value to 100k  (I'm merely the digital guy here working with RF engineers). 

     We have some 46.5k in our stock, so I was going to use those instead of the recommended 47k.  Is there any reason that a slightly higher or lower value will cause problems, say +/- 2%?  As for the capacitave load, I am following the recommendations given for the maximum allowable load.

     

    Thanks!
    !Clark

  • 0 in reply to Clark Scheff
    TI__Guru 70612 points

    Hi Clark,

    I wouldn't expect any negative impact if you deviate from the 47K by an amount equal to the tolerance a typical resistor has. This being said, I would not anticipate any issues using 46.5K.

    Regards,
    Andreas

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