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Interrupt vector specification, where to find?

Other Parts Discussed in Thread: MSP430F5438

Hi,

I'm wondering where the interrupt vectors are specified. From the example code for the F5438 device I can find the following vector:

 

 

 

 

// Timer A0 interrupt service routine
#pragma vector=TIMER1_A0_VECTOR
__interrupt void TIMER1_A0_ISR(void)
{
  P1OUT ^= 0x01;                            // Toggle P1.0
}

but also:

// Timer_A3 Interrupt Vector (TAIV) handler
#pragma vector=TIMER1_A1_VECTOR
__interrupt void TIMER1_A1_ISR(void)
{
  switch(__even_in_range(TA1IV,14))
  {
    case  0: break;                          // No interrupt
    case  2: break;                          // CCR1 not used
    case  4: break;                          // CCR2 not used
    case  6: break;                          // reserved
    case  8: break;                          // reserved
    case 10: break;                          // reserved
    case 12: break;                          // reserved
    case 14: P1OUT ^= 0x01;                  // overflow
             break;
    default: break;
  }
}

If I'm going to use another interrupt, how do I know what range it has and what interrupt happens at what place in the vector?

/Adde

  • Hi,

    There are a few references that can help you understand the function & scope of each interrupt:

    1. The User's Guide: At the end of each chapter the interrupt scheme is described, and in the systems chapter the types of interrupts are specified. This is the primary document to refer to.

    2. The datasheet lists the interrupt vector table and priority list. Some peripheral interrupts take priority over others. This is also a helpful doc.

    3. In terms of syntax, the code examples are useful and also the header files show the definitions you can use.

    Hope that helps...

  • The definition of the TIMER1_A0_VECTOR and TIMER1_A1_VECTOR are found in the msp430x54x.h header file which should be included in the *.c file this code is found in.
    You will find the other vectors defined in that file as well.

    In general, when asked where a symbol is defined, I generally do a search for the symbol name in the various files of the project and files in the directories specified to the compiler to be included.
    For example:

    In IAR, the support files are found in C:\Program Files\IAR Systems\Embedded Workbench 5.0\430\inc.
    In CCE, the support files are found in C:\Program Files\Texas Instruments\CC Essentials v3\tools\compiler\MSP430_31\include.

     

  • BrandonAzbell said:
    The definition of the TIMER1_A0_VECTOR and TIMER1_A1_VECTOR are found in the msp430x54x.h header file which should be included in the *.c file this code is found in.
    You will find the other vectors defined in that file as well.

    Yes, I had no trouble finding these. It was more about their contents, maybe I described my problem in the wrong way. Brandons answer took me a long way though. I thought had looked all over the User Manual but clearly I missed something.

    However, there is something missing for me. My device, a F5438, has 2 Timer A and 1 Timer B. The .h-file specifies 2 vectors for each timer, why is that? Could Timer B have two "tasks" going on at the same time?

    #define TIMERB1_VECTOR          (59 * 1u)                    /* 0xFFF6 Timer_B7 CC1-6, TB */
    #define TIMERB0_VECTOR          (60 * 1u)                    /* 0xFFF8 Timer_B7 CC0 */

    When I look in the user manual I see only one interrupt vector namned TAxIV which outlines CC1-6, TB. Is this used for both cases and what is their difference?

    /Adde

  • Please take a look at the MSP430F5438 datasheet on the Product Folder in the Interrupt Vector Addresses section on page 14.  You will see 2 interrupts associated with Timer_B0.  One for the CCIFG0 and one for the CCIFG[1-6].

    Also, in the MSP430x5xx Family User's Guide (SLAU208) in Section 13.2.6, you will see a description of this.

    The TBxCCR0 CCIFG flag has the highest Timer_B interrupt priority and has a dedicated interrupt vector.
    The TBxIV flag and the TBxCCRn CCIFG flags (excluding TBxCCR0 CCIFG) are prioritized and combined to source a single interrupt vector.

  • Thank you BrandonAzbell, I now got the complete picture of this.

    You have to be patient with me, although I'm starting to get familiar both to the MSP430x5x and to TI documentation.

    /Adde

  • And I hope that I am not coming across as flippant.  [;)]

    I realize it take some time to get used to how the documentation is structured and where to find specific information.  For the MSP430 family of devices, there are generally 2 main documents associated with the device itself, the datasheet and the Family User's Guide.

    The datasheet will contain information specific about that particular device including memory content, speed, peripherals used, pinout, etc.  Since the MSP430 CPU core itself supports a certain amount of interrupts/interrupt vectors, details regarding how the various possible interrupt sources are hooked up are also in the device specific datasheet.

    The Family User's Guide will provide more detail about each peripheral module that could be available on a given MSP430 device.  Some peripherals may not exist on certain devices, but the Family User's Guide provides information on all possible peripherals for a given MSP430 family varient, like the MSP430x5xx.

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