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MSP430AFE221 SMCLK for SPI

Johannes Miersch
Intellectual 305 points
Other Parts Discussed in Thread: MSP430AFE221

Hi!

I'm using a MSP430AFE221 calculating heart rate and writing it to a LCD display. All in all the whole circuitry is a low power application, so no external crystal (XT2) is used. To communicate with the LCD i am using the built-in SPI interface. I was wondering if there is a chance to use the internal clock such as MCLK and SMCLK for the SPI.

Setting U0TCTL |= SSEL1 usually should get me SMCLK for further usage, right?

The problem i am having is that no test signals (i.e. some message like "TEST") i would like to send to the LCD is given out on SIMO pin (P1.5).

Do you have any idea how to use the internal clock for SPI communication instead of an external crystal?

Best regards and thank you very much in advance

-Johannes

  • 0
    Expert 2855 points

    Hi Johannes,

     

    The UCLK is provided by the master on the SPI bus. When MM = 1, BITCLK is provided by the USART baud rate generator on the UCLK pin. When MM = 0, the USART clock is provided on the UCLK pin by the master and, the baud rate generator is not used and the SSELx bits are “don’t care”.

    The 16-bit value of UxBR0+UxBR1 is the division factor of the USART clock source, BRCLK. The maximum baud rate that can be generated in master mode is BRCLK/2.

     

    Baud rate = BRCLK / UxBR  with UxBR= [UxBR1, UxBR0]

    From the UxTCTL register the field SSELx allow you to select the BRCLK source clock.

    00 External UCLK (valid for slave mode only)

    01 ACLK (valid for master mode only)

    10 SMCLK (valid for master mode only)

    11 SMCLK (valid for master mode only)

    Best regards,

    AES

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