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CPU cycles of F54xx

old_cow_yellow
Guru 58965 points


I tried to count the CPU cycles of F54xx using KickStart (slac050t.zip).

I use the KickStart simulator as well as FET debugger to count CPU cycles of exact the same code with no I/O or other wait loops involved. They showed different results.

The FET debugger shows substantially higher total counts. However, I also noticed that FET debugger says pushm #8,R11 takes only 1 cycle to execute. This is lower than what simulator says -- 10 cycles. So there must be other instructions which FET debugger shows higher counts or the simulator shows lower counts.

What else is wrong? Is the simulator entirely correct?

  • TI__Expert 4420 points

    hi OCY, you'll probably have to ask IAR directly to find out how accurate they claim the simulator really is, but I don't rely on it for anything that requires cycle accuracy.  when i've needed to measure exact cycle counts, I use the timer to count the elapsed cycles between routines .  Have you tried this?  i'm curious to see what the difference is between the actual number of cycles vs the simulator.

  • in reply to adrian
    Guru 58965 points

    Adrian,

    Thank you for your advice.

    I set up TA0 to count the SMCLK (which is the same as MCLK), and verified that the cycle counting in KickStart FET-debugger is almost the same as what TA0 counts. For the particular snippet of code, the KickStart Simulator counts ~224000 cycles while both the FET-debugger and TA0 count ~235000 cycles.

    However, FET-debugger cycle counting has its own problems too. It appears to me that when it releases the CPU (or when it halts the CPU), a few cycles are lost or not counted. I have a short test program to show my point.

    main: mov.w #0x5A80,&WDTCTL
     mov.w #0x5C00,SP
     mov.w #0x0224,&TA0CTL

    test_point1:pushm.w #12,R15
     pushm.w #12,R15
     pushm.w #12,R15
     pushm.w #12,R15
     pushm.w #12,R15
    test_point2: jmp main

    From test_point1 to test_point2, there are 5 identical instructions. If you set up a break-point at test_point1 and another break-point at test_point2, FET-debugger will show you that it takes 57 cycles to execute these 5 identical instructions and the TA0 counter will confirm that too. This implies that each of them takes 11.4 cycles which is obviously wrong.
     
    Furthermore, if you single-step, FET-debugger will show that each pushm instruction takes only 1 cycle (and TA0 counter agrees with that too). The total from test_point1 to test_point2 is 5 cycles, not 57 cycles as shown before. The correct count should have been 70 cycles.

    TA0 did not show the actual number of cycles either.

  • in reply to old_cow_yellow
    TI__Genius 16215 points

    Just to clarify what IAR does with the cycle counts. When executing in FET debugger mode, IAR cycle counts are not reliable. IAR cycle counts are more reliable only if you are executing it in simulator mode only.

    Also, another way of measuring your clock cycles much more accurately is by feeding your MCLK out when you are executing the instructions of interest. This signal has to be fed to another MSP430's Timer capture input and automatically counted by the MSP430 or use a Port interrupt on the MSP430 to trigger off a rising edge. This has to be executed without the JTAG on it too as JTAG does introduce extra clock cycles. This would be the most accurate way of doing it.

    Regards,

    William

  • in reply to William Goh
    Guru 58965 points

    William,

    Thanks for your reply.

    Yes, I tried to use the IAR simulator too. It was quite disappointing that it could not even count the cycles for the old F11xx correctly. I do not expect that it could do any better for F54xx.

    Regards,

    --OCY

     

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