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Clock speed in CCE debug mode

graviton
Intellectual 435 points


I am working on FG4618 with CCE v3. I just discovered today that the MCLK is running faster while start the debugging using CCE.

I measured the serial clock connected to a prepherial, the  clock source is MCLK and it is divided by 32. When running in debug, the measured SCLK is 290KHz, that means MCLK is 9MHz; while boot the MCU on its own, the SCLK is 170KHz on 3.3V supply (MCLK is 5.4MHz) and 150KHz on 3.0V supply (MCLK is 4.8Mz). Something is wrong.

Here is my clock setup code:

 

 

FLL_CTL0 |= DCOPLUS + XCAP18PF;

// DCO+ set, freq = xtal x D x N+1

SCFI0 |= FN_4;

// FLLD_2 set by default, x2 DCO freq, 8MHz nominal DCO

SCFQCTL = 121;

// (121+1) x 32768 x 2 = 7.99 MHz

 And an external watch crystal between XIN & XOUT is connected for ACLK 

What did I do wrong? Thanks!

  • 0
    TI__Guru 64600 points

    I would guess you are observing effects of the DCO frequency vs voltage supply.  This is discussed in the MSP430FG4618 datasheet in Electrical Characteristics section, specifically on page 42.

    Regarding the effects of the frequency when the debugger is connected, how do you have CCE configured to set a target voltage?  This is only relevant if you configure the board to receive power from the emulation pod.
    In CCE, if you select the Project->Properties.

    Go to the TI Debug Settings Menu.
    Select the Target Tab.
    Highlight MSP430 Properties and check the "Target Voltage (mV)" parameter.  By default, I believe it selects 3000mV, or 3.0V.

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