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Peripheral and timer power in LPM3?

Other Parts Discussed in Thread: MSP430F2274

Hi,

In LPM3 during which:

  • Low-power mode 3 (LPM3)

–   CPU is disabled.

–   MCLK and SMCLK are disabled.

–   DCO dc-generator is disabled.

–   ACLK remains active.

We would only have running ACLK, and in many MSP430 example routines timer_A is configured to use ACLK as input source and wake up MCU at its interrupts. In this case for most of the time CPU clock off.

But does the peripherals consume power in LPM3? Most of the peripherals can be sourced from ACLK, including 

Timer_A

TASSELx Bits 9-8 Timer_A clock source select

00 TACLK

01 ACLK

10 SMCLK

11 INCLK (INCLK is device-specific and is often assigned to the inverted TBCLK) (see the

device-specific data sheet)

Timer_B

TBSSELx Bits 9-8 Timer_B clock source select.

00 TBCLK

01 ACLK

10 SMCLK

11 INCLK (INCLK is device-specific and is often assigned to the inverted TBCLK) (see the

device-specific data sheet)

ADC10

ADC10CTL1.ADC10SSELx Bits 4-3 ADC10 clock source select

00 ADC10OSC

01 ACLK

10 MCLK

11 SMCLK

WDT+

WDTCTL.WDTSSEL Bit 2 Watchdog timer+ clock source select

0 SMCLK

1 ACLK

USCI A & B

UCSSELx Bits 7-6 USCI clock source select. These bits select the BRCLK source clock.

00 UCLKI

01 ACLK

10 SMCLK

11 SMCLK

The datasheet of MSP430F2274, page 29, Low-Power-Mode Supply Currents (Into V CC ) Excluding External Current, defines in footnote (1) that the current values are measured when

“All inputs are tied to 0 V or VCC . Outputs do not source or sink any current.”

But what about the internal possibly running peripherals clocked by ACLK? How much power/current does Timer_A, Timer_B, ADC10, WDT+, USCI A & B consume if they are all running, even without driving or sampling I/O pins (like isolated in the “internal” world of the SoC)?

In addition, as shown in SLAU144I, MSP430x2xx Family User's Guide SLAU144I, even ACLK itself can be sourced from 12KHz VLOCLK, LFXT1CLK, LFXT1 Oscillator, XT2 or DCOCLK. Apparently the higher frequency, the larger power/current consumption there would be.

I understand that it is difficult to define and measure exactly peripheral power consumption because it is predominantly determined by board layout and external components, as well as other factors such as how fast the USCI SPI/I2C are running at. But in LPM3, at least USCI would not be running (please correct me if wrong here), and how much current would each of the possible running peripheral sourced by ACLK drain, and most importantly the timer modules which are/is used to wake up CPU?

 

Matt

  • most peripherals only consume power when doing something.
    Teh MSP is done in CMOS technology, so msot of the power consumption is required to change the charge of the gate capacitances of the FETs that build the logic. No state change, no charge change needed and no power drawn.

    Only a few components draw power when not doing anything. This includes the ram, the CPU registers, the reference generator (the crystal oscillators are doing something if the crystals are oscilalting).

    However, components that are changing state, such as a tiemr that gets clocked, in inputs that are gettign an input signal, are drawing current. and the current linearly depends on the frequency they are exposed to. Actually, it is a chage that is 'consumed' and charge per second is current. So the more charge changes per second, the higher the current.

    How much it is? I don't know.

  • Jens,

    I didn't know about the CMOS architecture before, thanks for the explanation. Then indeed the power consumption is proportional to the frequency of charging/recharging. We would only use timer clocked by VLO to wake CPU from sleep, so the total consumption seems good.

    Matt

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