I have a strange behavior with debugging the enable interrupt instruction. In the following example I use the Timer B for description, but this looks like a general problem with all interrupts. When the timer requests an interrupt while the GIE bit is cleared, the interrupt is not accepted. That's expected. But when I set the GIE bit again, the wrong interrupt vector is executed. Following symptoms can be observed:
- The PC register points to 0x0000 (special function register area)
- The SP is decremented by two words. The stack got the values: return address and status register.
- The SR register is cleared (GIE is zero)
So this looks like a normal interrupt accept cycle except that the vector at address 0xFFFA is ignored and read as zero. This happens while single stepping with CCS 5.1.1.00028. Is this a bug in the CCStudio debugger or in the program? An update to CCS 5.2.0.00071 does not change this behavior.
This is obviously a bug in the CCS debugger. Unfortunately this post has been moved to the microcontroller group. Any chance to get a comment from Texas Instruments?
#include <msp430F2618.h>
static unsigned int s_uTickCount;
// Timer B0 interrupt service routine for CCR0
#pragma vector=TIMERB0_VECTOR
__interrupt void Timer_B(void)
{
++s_uTickCount;
}
#pragma vector=TIMERB1_VECTOR
__interrupt void Timer_BIV(void)
{
}
void main(void)
{
WDTCTL = WDTPW + WDTHOLD;
__bic_SR_register(SCG0);
BCSCTL1 = XT2OFF | DIVA_2 | CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
BCSCTL2 = SELM_0 | DIVM_0 | DIVS_0;
BCSCTL3 = XT2S_0 | LFXT1S_0 | XCAP_2;
TBCCR0 = 0xFFFF;
TBCCTL0 = CCIE; // CCR0 interrupt enabled
TBCTL = TBSSEL_2 + MC_2; // SMCLK, continuous mode
// await first counter register wrap
while (TBR < 0xFFF0) ;
while (TBR > 0x1000) ;
// the interrupt request is pending now
_bis_SR_register(GIE);
__delay_cycles(10); // bad interrupt occurs here
}
