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MSP430F5638 Driverlib UCS

Other Parts Discussed in Thread: MSP430F5638, MSP430WARE

Hi,

did anyone initialises the msp430f5638 with an extrenal XT1 and external xt2(20MHz) ?

Normaly the port of the xt1 have to be selected, but the xt1 Pins 13 and 14 had no port number.

Maybee someone can post an initialisation source code.

THX

  • Roger Heil said:
    Normaly the port of the xt1 have to be selected, but the xt1 Pins 13 and 14 had no port number.

    From looking at the MSP430F5638 datasheet SLAS650B it is different from other devices, in that on the MSP430F5638 XIN and XOUT are on their own dedicated pins rather than being shared with other port pins. There are no PxSEL bits given for XIN and XOUT in datasheet SLAS650B.

    Looking at the examples\devices\5xx_6xx\MSP430F563x, MSP430F663x Code Examples\C\msp430f66xx_UCS_04.c in MSP430ware_1_20_01_08 shows that for MSP430F563x device instead of enabling the XT1 vis PSEL bits you instead need to use the BAKCTL module:

    while(BAKCTL & LOCKIO) // Unlock XT1 pins for operation
      BAKCTL &= ~(LOCKIO);

    The reason for these differences is that the MSP430F5638 has a Battery Backup Control which allows the RTC_B module to continue to operate in LPMx.5 mode.

  • Chester:  Thank-you.

    After hours of pouring through the MSP430F5638 datasheet, the MSP430F6xx and MSP430F5xx Family User's Guide, which make no mention of this requirement to unlock the XT1 pins, trying different crystals thinking they were all bad, your post pointed out the problem.  Since your post last year, the LOCKIO bit seems to have been renamed LOCKBAK in the header files, Family User's Guide, and example code.  This information is also buried in section 5.3 of http://www.ti.com/lit/sw/slau316/slau316.pdf where the bit is still called LOCKIO.

    To Texas Instruments:  Shouldn't this information be in the Datasheet and Family User's Guide?!?!  Shame on you!  I can't tell you how upset I am. >:|

    The ostensible reason given in slau316 for having to unlock the pins is explained poorly, and I still don't understand why the backup system locks the XT1 pins.  For that matter, the whole voltage backup system is explained poorly.  A better job needs to be done.

  • William Hue said:
    The ostensible reason given in slau316 for having to unlock the pins is explained poorly, and I still don't understand why the backup system locks the XT1 pins.  For that matter, the whole voltage backup system is explained poorly.  A better job needs to be done.

    Yes, the backup system is quite new by both, concept and implementation. It is an extension of the LPM4.5 introduced wiht the first 5x series chips. The idea behind this lock is to shut off everything that can be shut off, including the control registers, in order to reduce power consumption by another few µA.

    And I agree that the documentation is still a bit behind. Especially since you won't find this vital information where you might look for it (the clock system).

    If you carefully read the complete users guide, you'll find these bits of vital information sooner or later. Hwoever, mos tpeople only read the chapters they think they need - not knowing that there other modules involved and therefore other parts of the documentation is required to be read too. The information is there, but unless you already know that it is there, you don't know where you have to look for it. :(

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