Hi, I am here again.
I need to use the watchdog in my project.
Reading documentation, I have understand that once I have started the WDT, I need to "feed" or "kick" the dog in the code to avoid a PUC. So, to start using WDT, my first idea is: start the WDT and a generic timer. In the generic timer interupt I "feed" the dog, so if I have configured a timer overflow value lower than WDT interval, I will "feed" the dog, but if this time is greater than WDT, PUC. My code is here (my first tests without the lines have been commented):
#include "msp430x54x.h"
unsigned char selection=0;
void main(void)
{
WDTCTL = WDTPW + WDTIS_4 + WDTCNTCL + WDTSSEL_1; // watchdog pass, watchdog time interval: 1 sec (page 386 User's guide), clear register,
// select ACLK as clock source
/*
TA1CCTL0 = CCIE;
TA1CCR0 =15000; // With prescale selected, 15000 => ~3.6 second (near to limit between WDT feeding or PUC)
TA1CCTL0 &= 0xFFFE;
TA1CTL = TASSEL_1 + MC_1 + TACLR + ID__8; // ACLK as clock source, Timer UP mode, clear register prescale /8
*/
__bis_SR_register(GIE);
for(;;)
{/*
switch (selection)
{
case 0:{break;}
case 1:
{
WDTCTL = WDTPW + WDTCNTCL;
WDTCTL = WDTPW + WDTIS__32K + WDTSSEL_1;
selection=0;
break;
}
}*/
}
}
#pragma vector=TIMER1_A0_VECTOR
__interrupt void TIMER1_A0_ISR(void)
{
selection=1;
}
Well, my problems start with WDT interval, if I understand correctly the User's Giude, with my configuration, I have to achieve a 1 second interval, but I obtain about 3.5 seconds. This time is calculated with a breakpoint in the first line of main and the first line of case 1. I suppose that with way, there will be some delays, but not as long as 1 second or more.
To test another way (maybe two timers sourced to a same clock source could create problems, it is a supposition by my side), I did the commentaries that you see in this code (I only start the WDT and a infinite loop). So I do not "feed" the WDT in any moment, it will produce a PUC. But the time between the unique breakpoint in the first line of the main holds constant (about 3.5 sec).
The formula showed in the user's guide, for WDTIS = 4, is "Watchdog clock source /32k ". If I use the 3.5s in this formula: f(watchdog clock source)/ 32000=1/3.5
f(watchdog clock source)= 32000/3.5 = ~10KHz instead of 32KHz. The VLO frequency is about those 10KHz, but I do not have modified any UCSCTLX register for changing the clock source for ACLK.
I do not know if I am doing something wrong or I do not understand well the WDT functionality. ¿Any idea, correction, etc.?
Thanks in advance.
