CC1101 Register reading problem (IOCFG2)

Lior Baz

Hello,

I am running a 430F5137 MCU using 32768Hz Crystal, and a 26MHz crystal for RF.

The code occasionally gets stuck, especially when MCU is located in an area of noisy RF (there are a lot of units which are scheduled to transmit, more or less at the same time).

I've used a debbuger, and found out that the code is stuck in an infinite loop while trying to perform a reading of the IOCFG2 register:

uint8 ReadSingleReg(uint8 addr)
{
uint8 data_out;

// Check for valid configuration register address, 0x3E refers to PATABLE
if ((addr <= 0x2E) || (addr == 0x3E))
// Send address + Instruction + 1 dummy byte (auto-read)
RF1AINSTR1B = (addr | RF_SNGLREGRD);
else
// Send address + Instruction + 1 dummy byte (auto-read)
RF1AINSTR1B = (addr | RF_STATREGRD);

while (!(RF1AIFCTL1 & RFDOUTIFG) ); // <====== STUCK FOREVER.....

data_out = RF1ADOUTB; // Read data and clears the RFDOUTIFG

return data_out;
}

Here are some registers values:,

RF1AIFERR = 0x0005 ==> Output data not available error flag (OUTERR) + Low core voltage error flag (LVERR)

RF1AIFERRV = 0x0002 ==> Low core voltage error (LVERR)

RF1AIFCTL1 = 0x0034

RF1AIFIV = 0x0

RF1AIV = 0x0

RF1AIE = 0x0

RF1AIES = 0x0200

SVSMLCTL = 0x0

PMMCTL0 = 0x9680 ===> VCORE level 0, PMMHPMRE = 1

SVSMHCTL / SVSMHCTL = 0x0

As I understand from the error, there might be a problem with the core voltage (Unless this is false alarm as indicated in RF1A6). However, I've set it in an earlier phase to level 2 (SetVCoreUp(2)), so according to the datasheet it should be enough.

1. Does the "LVERR = 1" has something to do with RF1A6?

2. What can explain the phenomena specifically, when acting in a noisy environment (all other MCU are transmitting at once)?

Suggestions, anyone? Is there more information I can provide in order to get to the bottom of this?

Thanks,

Lior.

over 13 years ago

0 Lior Baz over 13 years ago

Intellectual 375 points

I think that I've been able to narrow down the problem a bit:

I can't read the register from the Since the VCORE is too low -> I can't set the VCORE to 2 since the voltage SVS (supply voltage supervisor) threshold is exceeded.

When I use the following command (within the SetVCoreUp function):

SVSMHCTL = SVMHE | SVMHFP | (SVSMHRRL0 * level);

the following condition always generates true:

if ((PMMIFG & SVMHIFG) == SVMHIFG) ==> meaning, the VCC is not high enough to set the VCORE voltage.

However, I don't know where is the configuration problem (if there is any)...

Here are the related registers:

SVSMHCTL = 0xC001

SVSMLCTL = 0x0

PMMCTL0 = 0x9680

PMMCTL1 = 0x0

PMMIFG (Before setting SVSMHCTL) = 0xB200;

PMMIFG (After setting SVSMHCTL) = 0xB270; ==> SVM high-side voltage level reached + SVM high-side interrupt flag + SVS and SVM high-side delay expired

Does anyone see a configuration problem? Why is the SVMHIFG bit is always on after setting the SVSMHCTL register?

Thanks,

Lior.

0 Lior Baz over 13 years ago in reply to Lior Baz

Intellectual 375 points

An update (for those who follows this thread...):

I've read in the CC430 User guide that "If DVCC remains below the SVMH level and software attempts to clear SVMHIFG, it is immediately set again by hardware"

So since both SVMHIFG (Interrupt flag) & SVSMHDLYIFG (expired interrupt flag) are set, I've decided to clear the SVMHIFG (and if the Vcc is still below threshold, it should jump right back up to 1):

PMMIFG &= ~SVMHIFG;

By doing that, I've managed to pass the if ((PMMIFG & SVMHIFG) == SVMHIFG) check, meaning that Vcc is high enough to raise the VCORE.

However, Now I get an OPERR (Operand error flag) when I am trying to read the IOCFG2...

Does somebody have an idea how these 2 errors are connected?

Is my enhancement is legal / correct?

Thanks,

Lior.

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CC1101 Register reading problem (IOCFG2)