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SPI wiring diagram

Other Parts Discussed in Thread: MSP430F6636

Hi I am working on MSP430F6636 microcontroller. I have a doubt about interfacing a SPI master (MSP430) to two SPI Slaves.

The communication link is simplex and the data flow is always from SPI master to SPI Slave.

I have attached a rough sketch of the interface diagram with the pin number and corresponding port number. Please let me know if this schematics would serve its purpose.

  • SPi has 3+x wires. Connect SCLK of the master to the slave clock inputs, and the MOSI (master-out-slave-in) to the slaves input pins. And if you want a return value, connect the slave output to the MISO (master-in-slave-out) pin of the MSP.

    Besides this, you'll need two independent GPIO lines, connecte to the slaves CS (chip select) pins. Before startign a transfer, select the slave of your choice by pulling its CS signal low manually. After transfer (ensure that the transfer is complete by checking the USCIs BUSY bit) pull it high again.
    And use 3-wir emode (as the CS lines don't count). 4-wire mode is for MSP multi-master or slave operation.

    p.s.: if your slaves are listening only and their output is not connected to the SOMI line, you may pull the CS line of more than one slave low and sent them the same data simultaneously. E.g. for resetting several identical slaves at once.

  • Hi Jens,

    Based on the information you gave I have developed a rough sketch of the interface diagram for SPI communication between 1 master and 2 slaves.The schematics contains both port number and pin number.

    Please let me know if this schematics would work.

  • SPI is a bus. so as long as each slave has its own CS signal, you can put both slaves' MOSI and SPICLK pins together and only need one SPI module on the MSP.
    As long as its CS line is high, the slave is deaf and silent. (So on the 5438 with its 87I/O lines, you could connect 85 different SPI slaves on the same MOSI and SPICLK lines.)

    Unless, of course, if you need to feed them both simultaneously with different data, as you can do transfers on the same SPI bus only alternating.

    However, the schematics won't work with the default mapping. P2.0 is UCA0 clock while P2.1 is UCB0 MOSI. So you need to pair P2.1 and P2.3 or P2.0 and P2.4 :)
    And you only need one of these pairs. Depending on whether you need I2C or UART, chose either UCA0 or UCB0.

  • Hi Jens, Thanks a lot for the information. It was really useful to me. I just have one more question. As per the datasheet both USCI_B0 and USCI_A0 support synchronous SPI. My question is are they same or is there a difference between the two SPI.

  • sidd52595 said:
    My question is are they same or is there a difference between the two SPI.

    No, UCA and UCB SPI are identical. Only that in UCB the UCSYNC bit is read-only, because UCB only has SPI and I2C (both snychronous), while UCA has SPI and UART (which is async) and this bit switches the UCMODE functionality. (personally, I had joined this bit into UCMODE, but well...)
    So when you need UART too, use UCB for SPI, if you need I2C too, use UCA for SPI. If you only need SPI, you can throw dices.

    On 2x/4x family, there is a small difference in the interrupt vectors and where to set/check the IE and IFG bits, on 5x family, this has been unified.

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