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DCO adjust

Other Parts Discussed in Thread: MSP430F2272

Hey

Can I get ACLK, SMCLK and MCLK out on a pin, so I can measurement the frequency with a oscillascope and adjust DCOCTL reg. DCO and BCSCTL1 reg. RSEL ?????

#include "msp430f2272.h"

#define DCO_FREQ_VALUE          0x60      // DCOCTL reg. DCO = 3

#define RSEL_FREQ_VALUE         0x07    // BCSCTL1 reg. RSEL = 7

int main( void )

{

  // Stop watchdog timer to prevent time out reset

  WDTCTL = WDTPW + WDTHOLD;

 

                             P1DIR |= BIT4; //Output

                             P2DIR |= BIT0; //Output

                             P2SEL |= BIT0;                                       // enable aclk on pins

                             P1SEL |= BIT4;                             //enable SMCLK

                             BCSCTL1 = XT2OFF | RSEL_FREQ_VALUE;                         // Set DCO to Max allowable freq. and disable xtal2

                             DCOCTL = DCO_FREQ_VALUE;     

while(1){}

   return 0;

}

  • I use a external watch crystal

  • Michael Hansen said:
    Can I get ACLK, SMCLK and MCLK out on a pin

    Most MSPs have  dedicated pins on which the ACLK, SMCLK and MCLK can be output. On some MSPs only ACLK or ACLK/SMCLK is available. Sometimes, not ACLK is output, but SCLKDIV, which is ACLK divided by an optional divider in the clock system (which of course can be set to 1 and IIRC is 1 by default).
    Note that on some MSPs, the default setting for MCLK /SMCLK is DCOCLKDIV, not DCOCLK. And the DCO runs faster (by default factor 2) than SMCLK/MCLK do.

    You don't write which MSP you use, so I can only give the advice to look at your MSPs datasheet. The pinout will have 'ACLK' etc. on the respective pins. YOu need to put the GPIO pin into module mode (set its PxSEL.y =1) and set it to output (PxDIR.y=1).

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