Using XOUT while XIN receives system clock

Before you ask, yes I'm setting the port dir to output:

P2DIR |= BIT7;

P2OUT |= BIT7;

Don

There is a section near the end of the data-sheet that list how to set up  I/O pins.

All I have found is that CAPD.7 should be 0 and P2SEL.7 should be 0.  I do not know how to clear CAPD.7 to zero, and the other halts the micro.

Have you set the LFXT1Sx bits in the BCSCTL3, Basic Clock System Control Register 3 to "11" to select Digital external clock source?

From looking at the Pin Schematics in the datasheet unless the LFXT1Sx bits are "11" clearing P2.7 could cause LFXT1CLK to stop.

This is the code used to config the osc for external clock source:

BCSCTL1 |= XTS + XT2OFF;      // ACLK = LFXT1 HF XTAL

BCSCTL3 |= LFXT1S1;        // 3 – 16MHz crystal or resonator

do {

      IFG1 &= ~OFIFG;  // Clear OSCFault flag

      for (ii1 = 0xFF; ii1 > 0; ii1--) // Time delay for flag to set

       {      }

  }  while ((IFG1 & OFIFG) == OFIFG);    // OSCFault flag still set?

BCSCTL2 |= SELM1 + SELM0 + SELS;   // MCLK = SMCLK = HF LFXT1 (safe)

Don Powrie said:

BCSCTL3 |= LFXT1S1;        // 3 – 16MHz crystal or resonator

As an external digital signal is used the line should be:

BCSCTL3 = LFXT1S_3 + XCAP_0; // Digital input signal 

That didn't kill the micro, and the external clock is still being used by the micro.  However, P2.7 is still not usable as a digital output.

Any more ideas?  It sure seems like the XOUT pin should usable as a digital output when the clock is fed in on the XIN pin...

Please disregard.  I figured it out.

Don

Don Powrie said:

Please disregard.  I figured it out.

Please share your insight

Hi Don , please share your solution about Xin input Xout output

Thanks.

I cannot find the reply I ultimately received from TI, but basically the XIN and XOUT lines are a paired set and if you use XIN as an external clock input then the XOUT line cannot be used for anything.  These two lines have to either be used as both IOs or both for clocking the micro.

Hello,

I tried immediately. But the OFIFG oscillator fault flag is still stuck on 1.

I think digital external means  Vcc square signal, and i use 0.8V clipped sinus.

Here is part of my config file: (i tried to init clock first but with no better result)

Thanks for your response.

/******************************* WatchDog*/

	 WDTCTL = WDTPW | WDTHOLD;                	//Stop the watchdog timer so it doesn't reset our chip

	//************************************************* Ports

	
	/*            configuration port 2             */

        P2OUT = 0;
	P2SEL |= OSC_IN;
	P2SEL &= ~OSC_OUT;
	P2SEL &= ~(BUTTON_IN + OSC_POW_EN);
	P2DIR = OSC_IN | OSC_POW_EN | OSC_OUT; 


	/********************************************** configuration clock
     * Basic Clock System Control 2
     *
     * SELM_3 -- LFXTCLK
     * DIVM_0 -- Divide by 1
     * SELS -- XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when XT2 oscillator not present
     * DIVS_0 -- Divide by 1, DIVS_3 -- Divide by 8
     * ~DCOR -- DCO uses internal resistor
     *
     * Note: ~DCOR indicates that DCOR has value zero
     */
    BCSCTL2 = SELM_3 | DIVM_0 | SELS | DIVS_3;  // external XO


    if (CALBC1_1MHZ != 0xFF) {
        /* Follow recommended flow. First, clear all DCOx and MODx bits. Then
         * apply new RSELx values. Finally, apply new DCOx and MODx bit values.
         */
        DCOCTL = 0x00;
        BCSCTL1 = CALBC1_1MHZ;      /* Set DCO to 1MHz */
        DCOCTL = CALDCO_1MHZ;
    }

    /*
     * Basic Clock System Control 1
     *
     * XT2OFF -- Disable XT2CLK
     * XTS -- High Frequency
     * DIVA_0 -- Divide by 1
     */
    BCSCTL1 = XT2OFF | XTS | DIVA_0;

    /*
     * Basic Clock System Control 3
     *
     * XT2S_3 -- External Digital
     * LFXT1S_3 -- External Digital
     * XCAP_2 -- ~10 pF
     */
    BCSCTL3  = XT2S_3 | LFXT1S_3 | XCAP_0;