• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 79 subscribers
  • Views 824 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

HELP NEEDED FOR I2C : 24C02 RANDOM READ SEQUENCE USING USCI IN LAUNCHPAD

TURJASU PYNE
Intellectual 400 points


I am in a strange problem and no idea how TI has managed the tandom read sequence for 24C02 I2C EEPROM.

Random read for 24C02 says that there has to be the following sequence from I2C Master to the Slave:

START |  <CHIP ADDRESS WITH WRITE> | ACK FROM SLAVE | <START ADDRESS FOR READING SAY 00000000 > | ACK FROM SLAVE | START | <CHIP ADDRESS WITH READ> | ACK FROM SLAVE | <DATA 0 FROM SLAVE > | ACK FROM MASTER <DATA 1 FROM SLAVE > | ACK FROM MASTER | ................ | <DATA LAST FROM SLAVE > | NACK FROM MASTER | STOP FROM MASTER

Now while using the internal USCI module (B) I cannot generate the sequence of sending the device address with a read bit and with a repeated start. Because without a stop from the  master transmitter , I cannot initialize the master reader to send data bits to 24C02.


Can you please help me with some sample codes where 24C02 communication has been done IN RANDOM READ MODE.


THANKS

  • 0
    Guru 227245 points

    The USCI module does the start condition and slave addressing for you. YOu write the slave address to UCI2CSA register (without the R/W bit!, so you migh tneed to divide teh address given in the datasheet). This mus thappen while SWRST is still set.

    Then you clear SWRST, set the UCTR bit (to send the address) and set the UCTXSTT bit to start the addressing. When UCTXSTT clears, the address ha sbeen sent and either the slave has answered or not (in which case UCNACKIFG is set). Then you write the memory address into TXBUf, then you clear UCTR and set UCTXSTT again (don't set UCTXSTP, as you want a repeated start). Which will, after finished with sendign the address byte, do a start condition and send the slave address with read bit. And begins to read bytes from the slave. After each byte received, you'll get an UCRXIFG interrupt and can read the byte from the RXBUF. When you are done reading, set the UCTXSTP bit to stop the transfer. YOu might get one byte more than you need due to the double buffering (the USCI continues reading while you havn't read RXBUF yet)

    There are several threads in this forum explaining this in more detail and with code.

**Attention** This is a public forum