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interruptWhileErasingFlashQuestions

Mike Raines
Intellectual 315 points

Three questions...

We have done some scope testing using DIO markers and it seems to indicate that the pMM
SVMHIFG interrupt will interrupt an ongoing flash erase operation. 1. Is this the
expected behavior? 2. if I make the ISR very quick as in the example below where I
check a flag and if the flag is set, I return immediately, would the flash erase
complete normally, or will flash be corrupted? (We have a capacitor sufficient to
maintain power for the duration of a single segment erase plus some.) 3. If a flash
write operation is thusly interrupted, would it complete successfully, or corrupt?

//=======================================================================
//=======================================================================
#pragma vector=SYSNMI_VECTOR
__interrupt void SysNmiISR(void)
{
switch (SYSSNIV)
{
case 0x02: // SVMLIFG
TxBuffer(" ", 40, 1);
TxBuffer("*************** SVMLIFG", 40, 1);
__no_operation();
break;

case 0x04: // SVMHIFG
// ShutdownSaveTotals();
if (usingFlashFlag != 1) // if not erasing ow writing flash
ShutdownSaveTotals(); // else return now

break;

case 0x06: // DLYLIFG
TxBuffer(" ", 40, 1);
TxBuffer("*************** DLYLIFG", 40, 1);
__no_operation();
break;
............................

Thank you for your time,
Mike Raines

  • 0
    Guru 227245 points

    Mike Raines9552 said:
    if I make the ISR very quick as in the example below where I
    check a flag and if the flag is set, I return immediately, would the flash erase
    complete normally, or will flash be corrupted?

    The SVS interrupt is an NMI that measn you cannot disbale it through GIE. Now gues swhat happens when the CPU wants to feth the NMI ISR address from flash while flash is being written? Right, the flash controller will return 0x3fff. And the CPu would try to execute an ISR at 0x3fff which isn't there. And, well, wouldn't execute anything because it too gets 0x3fff as next isntruciton from teh flash controller (which is a JMP $ instruction).

    So the NMI interrupts the flash controller, allows the CPu to fetch the ISr value and execute the ISR. But the flash write has been interrupted and this means the written cell is in undetermined state. You cannot simple say 'make a cofffy breal and continue writing th ecell later'. Eithe ryou let the flash controller finish its job or you force a premature break (what you do) and then the jjob isn't done at all.

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