Floating, pull-high or pull-low which one is the best for power saving?

Sunglin Chen

Dear Friends,

In the general digital designs, people may pull-high, pull-low or floating with the input or output pins. I want to know in this three methods which one is the best for power saving? Thank you.

Sunglin.

over 12 years ago

0 seb over 12 years ago

Genius 4170 points

Datasheet says Pin should be set as output with output low. This is what I did in my design, and it works pretty good.

0 Hardy Griech over 12 years ago

Expert 2870 points

Floating input means randomly oscillating.

Hardy

0 Andy Neil over 12 years ago in reply to Hardy Griech

Guru 35565 points

HardyGriech said:
Floating input means randomly oscillating

Well, no - that is not what "floating" means. However, it is quite likely to happen as a consequence of leaving an input floating!

0 Jens-Michael Gross over 12 years ago

Guru 227245 points

MSP inputs have high impedance. Which means that a floating pin may catch radio waves or get any input value you can imagine. By itself, this isn't a problem. If the input isn*'t used, you can ignore it. However, input transistions require some current in the following logic. Which is bad for low power. But even worse is a specific thing in CMOS logic: when the input voltage is near the transition point of the input logic, then internal cross-currents start to flow. Which can reach several 100µA in worst case. Which is very bad for low-power.

A typical case where this can be observed is with the reference input. If it is charged when you swotch the reference off and go into LPM, you'll after some time, while it discharges, see the current of the sleeping MSP go up, then after some more time go down again until it reaches the initial value.

So inputs should be held either on low or high level. If nothing is externally pulling them up or down by design, then they should be either turned into low outputs or their internal pulldowns should be enabled. This minimizes any leakage.

0 Jason Work over 12 years ago in reply to Jens-Michael Gross

TI__Genius 10830 points

ULP Advisor > Rule 4.1 Terminate unused GPIOs

0 Sunglin Chen over 12 years ago in reply to Jens-Michael Gross

Expert 2335 points

Jens-Michael,

Thank you for your detailed explanation again. This information should be useful for any new MSP430 designers, like me.

Sunglin.

0 Sunglin Chen over 12 years ago in reply to Jason Work

Expert 2335 points

Jason,

The ULP rules is very clear to tell designers what to do with the I/O port. Good information. Thank you very much.

Sunglin.

0 Christian Steffen over 12 years ago in reply to Jens-Michael Gross

Expert 2300 points

Jens-Michael Gross said:
But even worse is a specific thing in CMOS logic: when the input voltage is near the transition point of the input logic, then internal cross-currents start to flow. Which can reach several 100µA in worst case. Which is very bad for low-power.

Some nice graphics in Leveraging Ultra Low Power Best Practices Introduction application note (pp. 6-7) depict this.

0 Jens-Michael Gross over 12 years ago in reply to Christian Steffen

Guru 227245 points

Christian Steffen said:
Some nice graphics in Leveraging Ultra Low Power Best Practices Introduction application note (pp. 6-7) depict this.

Nice application note. However, it is from 2008 and doesn't take care of the things that were introduced after. So some of the information is incomplete or does only apply to older MSPs.

Howewver, this specific drawing is nice, even though it is not 100% correct (the current begins to rise a good deal away from GND/VCC, near the transisiton point, while on the drawing it begins to rise as soon as GND/VCC are left)

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Floating, pull-high or pull-low which one is the best for power saving?