MSP430AFE2xx SD24_A noise floor

ANDREW MILLEY said:

Now, I have been testing this out and I cannot get significant bits from lower than the 14th (absolute) bit of the SD24MEM0 register. 

IMHO the 'moving precision' you mentioned, assumes no analog noise floor by the circuitry as it adds sort of a 'noise offset' to the signal and goes into the digital filtering as part of the signal.

ANDREW MILLEY said:

Even when I set SD24INCH0 to 7, shorting the inputs internally, I still see flipping of the 14th or 15th (absolute) bit.

After all, on OSR=1024, the digital filter 'analyzes' the last 4096 bits (moving by 1024 per conversion), which would, if just accumulated, give only a 12 bit result.
Averaging over multiple conversions should lead to a more stable result.
However, that much noise with shorted inputs seems to indicate that there is indeed a rather high fixed noise floor in the circuitry, as the signal should be flat, noise-free zero. So possibly the input differential OpAmp itself generates the noise. Or other components such as the reference, the integrator, the supply voltage.
Ti also specifies the SD24 to be a second-order delta-sigma converter. But how it is implemented in comparison to a standard first oder converter and how the digital filter is implemented, nobody knows.

In general, the 'moving precision' idea matches the datasheet: 90dB SNR means the noise is 90db below the signal, not below the reference. The smaller the signal, the smaller the noise. Why there is so much apparently static noise in your reading, I don't know.

Now I'm not an ADC expert and maybe this question should be posted in the ADC forum for further insights.

On the bottom line, the MSP internal ADCs are not to be compared with external high-precision ADCs which cost more than the whole MSP. If I need high-precision results, then I'd go for dedicated external components. 14 bits (= 0.025%) is quite a good result for internal components (even though the name 'SD24' promises more). Especially if the reference has a much higher error. (BTW, did you apply the 100nF Cref on Vref pin? If so, which material?)

Thank you for your descriptive reply.  I guess wasn't considering that the 90dB SNR applies to the ADC specifically but not necessarily to the PGA, which of course is still part of the signal path when shorting the inputs internally.  Like you said, this performance is still good but our application requires 16 bits so we may need to consider external components.  I am also going to take a look at the MSP430F673x family which claims a 100dB SNR which could give us the 16 bits but I am concerned about the package size.

As for the Cref, I am using the MSP-TS430PW24 development board which has a surface mount 100nF cap from Vref to AGnd.  According to the BOM, it is ceramic (digikey PN: 478-3351-2-ND).  If you think it would be worth my while, I could try another type of cap.  Any suggestions?

Dear colleagues,

I have nearly the same problem as ANDREW has. I need at least 16 bit stable result but expected to get 18-20. As I can see from this discussion it's impossible isn't it? And what decision could be - averaging of multiply samples? In my case I have nearly static input signal and I can do averaging for a quite a long period of time. Can it help to get required precision (18-20 bits)?

And the last question. What do you think, what for to declare of such a high precision (up to 30 bits) if it's not true actually?

Finally I've managed to get 17 stable bits using averaging of 1024 samples. And for my opinion there is no difference between OSR=1024 and OSR=256. So the matter really is the internal noise of the microcontroller. I don't know if it's possible to get more bits (for ex. using sw digital filter) but for my application it's not nessessary.

Hi Alexey:

That is fantastic that you were able to get 17 bits, since I was unable to get better than 14 even when I was using just the inputs shorted inside the microcontroller.  How were you able to do it?  Did it require extra filtering on the microcontroller power or reference pins?  Is there any chance you could share a simple schematic of your filtering scheme?

Thanks,

Drew

Hi Andrew,

You can see my test sw and hw on my page (tab "Files"). I do not use MSP-TS430PW24 in the experiments but my own board instead. It has LDO and ceramic cap on VCC, nothing special. With this sw & hw I have at least 16 stable bits (including sign). I hope this can be improved if:

- supply analog part through ferrite filer

- stop all parts of the micro except ADC during conversion

Good luck,

Alex

PS

I didn't remove comments. They are in Russian.

Alexey Petrov said:

Finally I've managed to get 17 stable bits using averaging of 1024 samples.

However, don't confuse this averaging with oversampling. Oversampling is a combination of averaging and superimposing noise (or a harmonic signal), to increase resolution beyond the original resolution of the ADC.

Alexey Petrov said:

And for my opinion there is no difference between OSR=1024 and OSR=256

Alexey Petrov said:

I don't know if it's possible to get more bits (for ex. using sw digital filter) but for my application it's not nessessary.

Hello all,

My experiments with SD24 (430AFE253) have shown that this ADC has only ~12 noise free bits. Good result for such device (I mean ADC integrated into MCU).

But my application (electronic scale) requires more bits, about 16. And because of the input signal has ~ 1/4 of FSR (even with Gain=32 and ext. ref.=1V) I need about 19 stable bits. For this application there is no need to have fast ADC sampling rate, you know. 10Hz is suficcient. So I can use OSR=1024 and then sw filtering to reduce noise level. But as my experiments shown, the noise is not white. It's closer to 1/f noise. When I try to filter 24-bits samples (using 4 continious stages of 1-st order low pass filter) I can see presence of rather low frequency component in the noise - up to 0.1Hz. Of course, adding more stages to the filter and adjusting coefficients I can reject this frequency. But in this case I can't differentiate my signal from the noise. Actually, using filtering, I've managed to get ~16 stable bits total, no more. Trying to get more leads to appear that low frequency deviations.

Ok, I thought, 1/f noise... Let's try to use the AC excitation of the tenzo-bridge. As I could read from some articles it should help to reduce (and even remove) 1/f noise from the signal. I tried this techique but without any success, result was the same.

May be anybody can clarify this situation, or, at least, say somewhat.

Thanks, Alex