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How do I use the Embedded Emulation Module?

Other Parts Discussed in Thread: MSP430F5659

I have read and read but there seems to be no information on how to actually use the Embedded Emulation Module (EEM) within the msp430f5659. One of the family guide's mentions "It is accessed and controlled through either 4-wire JTAG mode or Spy-Bi-Wire mode". But I have read through the JTAG info and there is no mention of the EEM or how to use it. I am looking for information that shows how to use the breakpoint features, with strong emphasis on the 2 hardware triggers on CPU register write accesses. All help is greatly appreciated!

I am not interested or inquiring about how to use EEM for debugging through CCS or IAR Workbench. My question is not related to debugging. I am looking at how to access this module internally through code, even if that means circle-routing gpio's into the JTAG pins and bit-banging the JTAG protocol to gain access to the module.

Please help!

  • Unfortunately, there is no much info about EEM from TI, only some examples for debugging with IAR or CCS. Maybe you can find something in msp430.dll source code.

    http://processors.wiki.ti.com/index.php/MSP_Debug_Stack

  • Thanks, the src looks like it'll have all the answers for me.

  • Brett Kuntz said:
    I am looking at how to access this module internally through code, even if that means circle-routing gpio's into the JTAG pins and bit-banging the JTAG protocol to gain access to the module.

    The EEM is not accessible by the CPU.

    Looping a port pin back to the JTAG ports is a nice idea, but I doubt it will work because the EEM controls the CPU, not otherwise. It wouldn't be a good thing if accessing an EEM function halts the CPU that has to program the EEM for the next step.

    I have no internal information, but my best guess is that controlling the EEM through a looped JTAG by the same processor is as possible as doing successful brain surgery on your own brain. Maybe less.
    But I don't say it is impossible. (I've done to many 'impossible' things myself in the past).

    In any case it would be quite a challenge.

  • I am assuming (or perhaps hoping) that the trip generated by a register write from the EEM could raise an interrupt for the CPU to handle. I need certain cpu registers to be write-protected from software access. I'm building a hypervisor that will hopefully run multiple systems within the system, so certain i/o, memory, flash, and cpu registers (like Status Register R2, SFR or SYS registers) need protection and/or special handling. Yes I know this is insane.

  • Such a hypervisor is a nice idea. However, since the MCU (at least in a normal applicaiton) won't take any external code. the application code inside is (or at least should be, if properly programmed) as safe as the hypervisor (which runs on the same CPU).

    Also, the EEM can stop the CPU at a breakpoint, but it cannot raise an interrupt. You'll only see that a breakpoint happend through JTAG - and in this case the CPU is stopped and you cannot do anything, inlcuding accessing JTAG to revive the CPU.
    The normal way at a breakpoint is that the supervisor scans the EEM, gets the info that a breakpoint happened, and then can 'simulate' an interrupt by pushing SR and PC onto the stack and moving the ISR address into PC (and clear GIE bit) before it releases the CPU again.

    If you really need a hypervisor, you'll need a second (maybe much smaller and cheaper) CPU that runs the hypervisor, does the JTAG access and communicates through normal communication channels with the application CPU.

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