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MSP430F2012 TimerA - Out0 not toggling when expected

I have set-up TimerA0 to count UP/DOWN and set the CCR0 to a terminal count that sets a half period point.  (abt 150 in this case)

The pin function for P1.1 for TA0(Out0) and set the  outmode for TACCTL0 to Toggle.

The TACTL interrupt is enabled.

I am getting the interrupt as expected and the output at P1.1 is toggling, but it only toggles at the zero points of the counter and not at the terminal point where it transitions from up to down and where there should be an EQU0 event occurring.

Is there something else that need to be set or reset?

  • Well, you do some things that aren't working as you think.

    1) In UP or UP/DOWN mode, CCR0 limits the TAR range. However, the OUT operation is affected. You cannot use it the way you would use CCR1.
    The documentation tells that the trigger happens when TAR counts to 0, not when it counts to CCR0. While in UP mode, this has proven to be not exactly true (you'll get first action on TAR->CCR= adn second on TAR->0), it apparently is on UP/DOWN mode.

    2) AFAIK, 'toggle' is a single-action outmode. It only triggers once. And while it would on TAR->CCR0 for CCR1, it apparently triggers on TAR->0 for CCR0.

    Try using 'toggle/set/ or /set/reset/ or any of the dual-action modes. Or use Toggle mode and set the timer in UP mode. Then it will count to CCR0, toggele, count again up, toggle etc. Which is exactly what you want.

    UP/DOWN mode is meant mainly for providing means of synchronized centric-symmetrical PWMs on CCR1..n (e.g. for dead time generation), in comparison to the start-point synchronized PWM in UP mode.

  • Jens-Michael Gross said:

    The documentation tells that the trigger happens when TAR counts to 0, not when it counts to CCR0.

    Are you referring to this phrase in the user guide?

    "12.2.5.2 Output Example — Timer in Up Mode
    The OUTx signal is changed when the timer counts up to the TACCRx value, and rolls from TACCR0 to zero, depending on the output mode."

    The corresponding line for Up/Down mode says this:

    "12.2.5.4 Output Example — Timer in Up/Down Mode
    The OUTx signal changes when the timer equals TACCRx in either count direction and when the timer equals TACCR0, depending on the output mode."

  • Precisely!

    In section 12.2.5.4 I should be able to read that and insert "0" where the "...x" is.  So the statement is misleading.  Reading in detail I do not yet find the detail of operation as you state in the first response.  However, some experimentation shows the following:

    Regarding statement #1:  Agreed the OUT operation is not the same for A0 vs. A1  In UP/DOWN mode with both interrupts enabled for CCRO and CCR1 the A0 ISR is only performed when TAIFG occurs and not when CCR0 occurs.  I then set up the A1 ISR using TAIV to try and catch the EQU0 and found that TIV_NONE (case 0) is never exicuted.  But now the A0 ISR was responding to EQU0.

    This is how I found this.  First what I am trying to accomplish is a synchronized centric-symmetrical operation but not for dead time.  I want a PWM output with an interrupt occuring in the center of the PWM on-time that triggers an ADC conversion start.  According to 12.2.5.4 I should be able to use mode 4 to dirve the OUT1 for the PWM and use EQU0 with mode 7 (mode 3 not available for T0) for A0.  This did not work.

    I did get it to work with the following:

    During Timer Init:

    TACTL = TASSEL__SMCLK + MC__UPDOWN + TAIE; //Set TimerA to use system clock in UP/DOWN mode

    TACCTL1 = CCIE + OUTMOD_TOGGLE;

    TACCTL0 = CCIE + OUTMOD_TOGGLE;

    Then in the TimerA0 ISR

    interrupt(TIMERA0_VECTOR) TIMERA0_ISR(void) {

         LED_OUT  ^= LEDGREEN; // P1.0

    }

    Then in the TimerA1 ISR

    interrupt(TIMERA1_VECTOR) TIMERA1_ISR(void) {

         switch (TAIV) {

              case TIV_NONE :

              break;

            case TIV_CCR1:

                // running PWM here

               LED_OUT ^= LEDRED; // P1.6

           break;

    default :

    break;

    }

    }

    With that I now get at P1.6 and PWM where I can set the duty with CCR1 and set the period with CCR0 and at P1.0 I get a transition at the half way point of the on time for P1.6.

  • Robert Cowsill said:
    Are you referring to this phrase in the user guide?[...]The corresponding line for Up/Down mode says this:

    Well, these phrases describe the behaviour of OUTx for CCRx where x != 0. As well as the diagrams do.

    The register description contains a note:

    7-5 OUTMOD RW 0h Output mode. Modes 2, 3, 6, and 7 are not useful for TAxCCR0 because EQUx= EQU0.

    However, experiments have revealed that CCR0 acts differently in up mode than described, making those modes still useful. I guess, this different behaviour also is present in up/down mode.

    To sum it up: OUT0 is not expected to be used as PWM output when the timer runs in UP or UP/DOWN mode, where CCR0 is controlling the timer cycle size. If you still use it, well, take what you get, as a free bonus :)

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