MSP430FR5739 4 wire SPI Master

Other Parts Discussed in Thread: MSP430FR5739

Firstly...I am fairly new to chip level programming.

I am trying to port a library that was written for the TI CC85XX device SPI interface using the MSP-EXP430F5438. We were handed the MSP430FR5739 experimenter board to do the interface with.  The only problem I am running into at this point is porting the setup that is used to the new board.

Here is the setup for the F5438:

     // The pin mapping is as follows
    // - RESETn at P5.0
    // - EHIF interrupt at P5.1
    // - SCLK at P10.0
    // - CSn at P10.3
    // - MOSI at P10.4
    // - MISO at P10.5

    // Setup SPI interface: Synchronous master mode, MSB first, MOSI/MISO updated on falling edge of
    // SCLK, MOSI/MISO sampled on rising edge of SCLK
    UCA3CTL0  = UCMSB | UCMST | UCSYNC | UCCKPH;

    // Setup SPI interface: Use SMCLK divided by 4, normally 4 MHz
    UCA3CTL1  = UCSSEL1;
    UCA3BR0   = EHIF_MCU_SPEED_IN_MHZ / 4;
    UCA3BR1   = 0x00;

    // Configure SCLK, MOSI and MISO as peripheral mode pins with pull-up, CSn as GPIO mode with pull-up
    P10SEL    = 0x31;
    P10DIR    = 0x19;
    P10OUT   |= 0x38; // SCLK

    // Start with RESET_N activated
    P5OUT    &= 0xFE;
    P5DIR     = 0x01;

My problem in porting to the MSP430FR5739 is that it does not use the same registers. I am confused with the settings for PxSEL0 & PxSEL1. I could not find the definitions for the primary and the secondary port functions.  Therefore I am unsure what to set that to.

Thanks for any information in this matter!