Hello all!
I have a very simple test program that the only objective is to output a PWM wave through P1.2. I have used CCS5.3 with the help of GRACE, for a msp430f2132 MCU. It generated the following code for "Timer0_A3_init.c":
(..)
/*
* TA0CCTL1, Capture/Compare Control Register 1
*
* CM_0 -- No Capture
* CCIS_0 -- CCIxA
* ~SCS -- Asynchronous Capture
* ~SCCI -- Latched capture signal (read)
* ~CAP -- Compare mode
* OUTMOD_7 -- PWM output mode: 7 - PWM reset/set
*
* Note: ~<BIT> indicates that <BIT> has value zero
*/
TA0CCTL1 = CM_0 + CCIS_0 + OUTMOD_7;
/* TA0CCR0, Timer_A Capture/Compare Register 0 */
TA0CCR0 = 749;
/* TA0CCR1, Timer_A Capture/Compare Register 1 */
TA0CCR1 = 225;
/*
* TA0CTL, Timer_A3 Control Register
*
* TASSEL_2 -- SMCLK
* ID_0 -- Divider - /1
* MC_1 -- Up Mode
*/
TA0CTL = TASSEL_2 + ID_0 + MC_1;
(..)
P1.2 is properly configured as seen in the debugger and generated code, I have WDT turned off and in the main I have a infinite while of __no_operation(), after Grace_init() is called.
I have selected SMCLK clock source of 1500KHz (I have configured DCOCLK divided by 8). Wanted and 0.5ms period PWM wave, with an output duty cycle of 30%.
What in a world I'm doing wrong here??? Can anyone help?
Thanks in advance!!!
