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TS430L092 and THOLD?

Bruce McKenney
Guru 102725 points

I'm interested in the THOLD signal on the TS430L092. It drives the /HOLD pin on the EEPROM, and originates in the FET430 TEST/Vpp wire.

Does anyone know whether/how CCS uses this signal in practice? I think I understand what /HOLD does, but it's not obvious to me why a JTAG programmer (of the EEPROM) would need to use it. (Truth be known, I've never come across a real gotta-have-it application for /HOLD, but that's just me.)

My interest is in replacing the EEPROM with a different chip, which uses that pin for something else (non-benign).

  • 0
    Guru 227245 points

    I can only guess, but my guess is that this signal tells the MSP that the incoming signals are NOT JTAG signals but rather I2C signals for accessing the EEPROM. It holds the MSP in inactive state, so the FET can update the EEPROM without the MSP interfering.

    After all, the JTAG signals of the FET are just GPIO pins and can be (ab)used for anything, as long as the target understands it.

    However, that's just a guess.

  • 0 in reply to Jens-Michael Gross
    Guru 102725 points

    Thanks for the suggestion; the catch is that the THOLD terminates at the EEPROM, and doesn't get to the MCU.

    If I were in a devious mood, I might imagine that the FET asserts /HOLD to deliberately cause the boot process to fail, so it has exclusive EEPROM access; but then I'd expect to see the 3-blinks failure indication. (So much for being devious.)

    It seems not unlikely that it's vestigial, i.e.  it had some value during (TI) development, and no one ever removed it. That result would certainly be salutary for me.

  • 0 in reply to Bruce McKenney
    Guru 227245 points

    Bruce McKenney47378 said:
    the catch is that the THOLD terminates at the EEPROM, and doesn't get to the MCU.

    Well, then of course it can't control the behaviour of the JTAG logic in the MSP.
    I don't have a schematic of teh TS430L092, so I couldn't check.

    Bruce McKenney47378 said:
    I might imagine that the FET asserts /HOLD to deliberately cause the boot process to fail

    The FET can always take control over the MSP and tell it to do whatever it wants, including not to boot at all. So this wouldn't be necessary.

    Bruce McKenney47378 said:
    It seems not unlikely that it's vestigial, i.e.  it had some value during (TI) development, and no one ever removed it.

    That's of course possible.

    Edit: I got the schematics and after a closer look, it seems that THOLD is used to inhibit the EEPROM, so it doesn't interfere with the JTAG programming of the MSP. Because all JTAG signals are also used for SPI, so any JTAG access could unintentionally activate the EEPROM and cause it to send something.

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