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How to ensure that during read vars they don't get updated in interrupt



I have a interrupt which reads RTC registers & one another important function every 1 sec after.

Now in main code I read these registers, how to ensure that while reading they don't get updated in interrupt. I don't want to disable interrupt as one important task I carry out in it

  • If you are talking about RTCHOUR/MIN (and so on) there is a bit RTCRDYIFG in the RTC module which allows you to know if it's safe to read the registers.

    If it's not what you were asking about, I suggest you save the content of the registers in the interrupt (in variables). And if needed with kind of semaphore protection.

  • I just want that when I read the 7 byte buffer register at that time it should get interrupted. Line I have read 0-3 bytes & in between int comes & changes byte 4-7. & data get corrupted when I read

  • Aamir Ali said:
    Line I have read 0-3 bytes & in between int comes & changes byte 4-7. & data get corrupted when I read

    Step 1: Disable the interrupts

    Step 2: Read the 8 bytes into your buffer

    Step 3: Enable interrupts

  • Alternatively (if you really do not want to disable interrupt).

    Step1: Read all bytes into a buffer.

    Step2: Read all bytes into another buffer.

    Step3. Compare the contents of these two buffers. If not the same, go back to Step 1. If they are identical, you are done.

  • Take it back.It does not work.

  • old_cow_yellow said:
    Take it back.It does not work.

    Why not? It's the way it is done with TAR if TAR is clocked by an asynchronous slow clock (to avoid TAR gets updated whiel being read, giving inconsistent low and high bytes):

    while (buffer != TAR) buffer = TAR;

    Sure, with 8 bytes/words it is more complex, and at some point you're unable to ever get a valid reading (if two reading loops are slower than one update)

  • Being an egghead, I think in general this method stinks. When the updates come too often, the two buffers will seldom be identical. Also the two could happen to be identical but are both composite and not the snapshot of real-time data at any given time.

    If the updates happen only once per second and this method takes much less time, it does work.

  • old_cow_yellow said:
    When the updates come too often, the two buffers will seldom be identical

    Thsi I already pointed out.

    old_cow_yellow said:
    Also the two could happen to be identical but are both composite and not the snapshot of real-time data at any given time.

    Unlikely, if teh change is caused by a propagated overflow. But of course you're right, if the data is random, it may be updated durign first read, then updated to somethign else and then coincidentally updated to the same as the first read and each time you get a mix and see the same. Yes, that's a possible (but unlikely) risk. Especially since it means that your reading is much slower (a tleast factor 3 then) than the update cycle.

  • I think this may work as you are working with RTC (most likely interrupt every sec).


    Main prog (read part):

    read_from_main=1;

    /*

    read all your data here from BUF1

    */

    read_from_main=0;

    if(main_interrupted)

    {

    main_interrupted= 0;

    /*

    read all your data here from BUF2

    */

    }


    Interrupt:

    if(read_from_main == 0) //if main wasn't reading the data

    { // it is safe to save them

    /*

    save your data to BUF1

    */

    }

    else // if main was reading the data (from BUF1)

    { //save the new data to BUF2 and signals to main

    main_interrupted = 1;

    /*

    save your data to BUF2

    */

    }

  • Mohamed Belaouad said:
    I think this may work as you are working with RTC (most likely interrupt every sec).

    The RTC_A through _C modules offer an interrupt when it is safe to read the registers. There's a status bit that tells you whether you are near the moment of transition or not and will trigger an interrupt if it is safe (you should still check it before reading since the interrupt could have been delayed). You can then read the data in the interrupt and maintain a copy in ram.

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