Hello,
I am having a couple issues with the final version of my code, and am asking for help. I have decided to use analogRead( ) to determine when the code starts by referencing voltage across a switch. My question is when using the command analogRead(P1IN), which pin is it referencing? Which pins can I use as inputs, as I am using pin 3&4 as PWM outputs. I am having trouble understanding this. because alot of pins are digital I/Os, but is there a specific pin used for the analogRead() function.
The other issue is that every two pulses a pulse overlaps the next. I am assuming this is to do with the counter, that it reaches max and then resets causing the overlap. Is this correct? If so, what are some corrective actions to prevent pulse overlapping. I have tried varing the OUTMOD, which then prevents the desired signal from being achieved.
//Troubleshooting: Program A is good, Program B overlaps Peak and Hold
#include <msp430f2012.h>
#include <msp430.h>
void main(void)
{
if(analogRead(P1IN)<0.5) //Initiate cycle start
{
WDTCTL = WDTPW + WDTHOLD; //Stop Watch Dog Timer
BCSCTL1 = CALBC1_1MHZ; //Set range
DCOCTL = CALDCO_1MHZ; //SMCLK = DCO = 1MHz
P1OUT = 0; //Initializes P1.0 to off state
P1DIR = BIT1 + BIT2; //Sets P1.1 + P1.2 to output direction
while(1) //Runs Continously
{
if(analogRead(P1IN)<0.5) //Configure Switch (Choose Continous 5ms x 10ms)
{
P1SEL |= (BIT2); //Declares TA1
TACTL= MC_1 + TASSEL_2; //Tells CCR0 to count up with SMCLK
TACCTL1=OUTMOD_7; //Sets Set/Reset Mode with TACCR1
TACCR0=10000-1; //Set CCR0 to 100 Hz (10ms Period)
TACCR1=5000; //Sets 50% duty cycle
}
// Peak and Hold Signal
//Step 1 (High Side & Low Side Static for 2.5 ms or by I=1A)
P1OUT |= BIT1; //Turns P1.1 on statically
P1OUT |= BIT2; //Turns P1.2 on statically
__delay_cycles(2500); //2.5 ms hold time
//Step 2 (High Side=Static Low Side=15 kHz)
P1SEL |= (BIT2); //Declares TA1
TACTL= MC_1 + TASSEL_2; //Tells CCR0 to count up with SMCLK
TACCTL1=OUTMOD_7; //Sets Set/Reset Mode with TACCR1
TACCR0=66-1; //Set CCR0 to 15 kHz (Hold Frequency)
TACCR1=33; //Sets 50% duty cycle
__delay_cycles(1500); //1.5ms hold time
//Step 3 (High side clamp on P1.1)
TACCR1=0; // 0% duty cycle
P1OUT &= BIT1; //Turns P1.1 off
P1OUT &= BIT2; //Turns P1.2 off
__delay_cycles(500); //500 microsecond clamp
P1OUT |= BIT1; //Turns P1.1 on
__delay_cycles(500); //550 microsecond on time
//Step 4 (5ms off time)
P1OUT &= BIT1; //Turns P1.1 off
P1OUT &= BIT2; //Turns P1.2 off
__delay_cycles(5000); //5ms delay
}}
