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Issue while use USI SPI without using interrupt

Other Parts Discussed in Thread: MSP430G2121

Hi there,

When I use the MSP430G2121, and use the USI SPI without using the interrupt. Which polling the USIIFG on the software. It should be worked by checking the other post mentioned about it.

However, when I measure the waveform without the debug tool is attaching. The number of clocks and the I/O I set looks in-correct.

Below is the code,

void main(void)
{
  volatile unsigned char GSensorData, tdata;

  WDTCTL = WDTPW | WDTCNTCL | WDTSSEL | WDTHOLD;    // Stop watchdog timer AND CLEAR

  BCSCTL3 = LFXT1S_2;                // ACLK = VLOCLK = 12KHz
  IFG1 &= ~OFIFG;                               // Clear OSCFault flag

  BCSCTL2 = SELM_0;                // MCLK = DCOCLK , SMCLK = DCOCLK
 
  DCOCTL = CALDCO_1MHZ;
  BCSCTL1 = CALBC1_1MHZ + DIVA_0;  

  P1OUT = 0x00;     // 0000 0001, Pull high for P1.0
  P2OUT = 0x40;     // 01xx xxxx, Pull high for P2.6 (CS), Pull low for P2.7 (INT)

  P1DIR = 0x18;        // 0001 1000,
  P2DIR = 0x40;     // 01xx xxxx, Set P2.6 to Output (CS), Set P2.7 to input (INT)

  P1SEL  = 0x00;  // 0000 0000

  P2SEL  = 0x00;  // 0000 0000
 
  P1REN = 0x1F;   // 0001 1111  Pull High/Low enable for P1.0~P1.4
  P2REN = 0xC0;   // 11xx xxxx  Pull High/Low enable for P2.6, P2.7

  USICTL0 |= USIPE7 +  USIPE6 + USIPE5 + USIMST + USIOE;        // Port, SPI master
  USICKCTL = USIDIV_2 + USISSEL_2 + USICKPL;                    // Use SMCLK /4
  USICTL0 &= ~USISWRST;                                         // USI released for operation    
  DelayLoop();
 
  SPI_CS_LOW;
  USISRL = 0x20;
  USICNT = 8;                   // USIIFG automatically cleared on USICNTx update
                                // start transfer while USICNTx not equal to 0,
  while (!USIIFG);               // Wait until the 8 bit transfer is done.
  tdata = USISRL;               // Read Dummy Data,
  USISRL = 0x0F;              // Load the second data to be transfered
  USICNT = 8;                   // reload counter to start the transfer.
 
  while (!USIIFG);
  tdata = USISRL;               // Read Dummy Data, test purpose,
  SPI_CS_HIGH;    
}

I use the P2.6 as the Chip Select Pin (SPI_CS_LOW and SPI_CS_HIGH) for control the Slave device. The SPI_CS_LOW goes first before the SPI data is senting. However, the code expect to have 8 x 2 clocks and then the SPI_CS_HIGH will be set. But the waveform captured doesn't look like that way. However, set the SPI clock rate faster, e.g. same as SMCLK, may set the clocks in the range of CS goes low and high. But the number of clocks are still incorrect. Again, the image below is captured on free running. No MSP430 debug tool is attached on the circuitry. Thanks for the help on answering.

  • Hi there,

    Update the waveform. When change to the 500KHz SPI clk, the count of clock seem to be correct. But the chip select is still set at wrong position. It seems to monitor the USIIFG doesn't give the desired result. Please comment.

  • > while (!USIIFG);

    USIIFG is a constant (==1) so this loop always exits immediately. You probably want:

    > while (!(USICTL1&USIIFG)) /*EMPTY*/;

  • Robert Yang2 said:
      while (!USIIFG);

    USIIFG is a constant. It is the value of the USIIFG boit inside the USI register. SO teh cexpression in the while (!USIIFG) is always true and the while won't ever loop.

    The correct loop would be

    while(!(USICTL1&USIIFG));

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