2013 Watchdog with External Clock

Hello,

I'm having a bit of difficulty with understanding what you are using the WDT for.

Are you intending to use it as a watchdog? In that case, the WDT should  and will trigger a PUC (Power Up Clear) and restart the software (the intended application for WDT).

If you are just using it as a timer, then why not use a timer module?

Please refer to section 10.2 of the MSP430x2xx Family User's Guide for more information on the WDT.

Thanks for your reply.

I'm using the Watchdog+ as a Watchdog, not an Interval Timer. I initialize it and periodically "reset" the counter so that it does not trigger a System Reset during normal operation. It's intended use is to trigger the reset only if the program should become nonresponsive. If everything is periodically functioning, then the Watchdog is continually reset prior to reaching its final count and the processor continues normally.

When I do my periodic reset of the Watchdog counter, it immediately resets the processor.

WDTCTL = WDTPW+WDTCNTCL;

thanks

jdata123,

It still sounds like you are encountering the WDT triggering a PUC. Per the User's Guide Section 10.2.2, this should only occur if you are "writing to WDTCTL with an incorrect password or [an] expiration of the selected time interval [occured]."

Are you handling the interrupt correctly? Below is a link to a code example which uses a similar system as you are trying:

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//******************************************************************************
//  MSP430F20xx Demo - WDT, Toggle P1.0, Interval Overflow ISR, DCO SMCLK
//
//  Description: Toggle P1.0 using software timed by the WDT ISR. Toggle rate
//  is approximately 30ms based on default DCO/SMCLK clock source
//  used in this example for the WDT.
//  ACLK = n/a, MCLK = SMCLK = default
//
//		  MSP430F20xx
//             -----------------
//         /|\|              XIN|-
//          | |                 |
//          --|RST          XOUT|-
//            |                 |
//            |             P1.0|-->LED
//
//  M. Buccini / L. Westlund
//  Texas Instruments Inc.
//  September 2005
//  Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.40A
//******************************************************************************

#include <msp430.h>

int main(void)
{
  WDTCTL = WDT_MDLY_32;                     // Set Watchdog Timer interval to ~30ms
  IE1 |= WDTIE;                             // Enable WDT interrupt
  P1DIR |= 0x01;                            // Set P1.0 to output direction

  _BIS_SR(LPM0_bits + GIE);                 // Enter LPM0 w/ interrupt
}

// Watchdog Timer interrupt service routine
#pragma vector=WDT_VECTOR
__interrupt void watchdog_timer(void)
{
  P1OUT ^= 0x01;                            // Toggle P1.0 using exclusive-OR
}

Hopefully this helps, if not, can you provide me with the code you are using to control the WDT?

Additional info, WDT+ Initialization:

/* WDT is clocked by fACLK (assumed 32KHz) */

#define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL)     /* 1000ms */

// **** Watchdog ****

void initWDTPlus(void)

{

  WDTCTL = WDT_ARST_1000 + WDTHOLD;

  IE1 = IE1 & ~(WDTIE);

  IFG1 = IFG1 & ~(WDTIFG);

}

void pingWDTPlus(void)

{

  WDTCTL = WDTPW+WDTCNTCL;

}

jdata123,

Here's a thought.

When you use the function pingWDTPlus, it is resetting the register to just WDTPW+WDTCNTCL. I would suggest you use the format below. It will ensure that you are not resetting the other settings of your WDT.

WDTCTL |= WDTPW+WDTCNTCL

Let me know if this helps or not.

jdata123 said:

void pingWDTPlus(void)
 
{
 
  WDTCTL = WDTPW+WDTCNTCL;
 
}

I think instead you need to also set your delay again - the way you have it set now, you will actually be clearing your watchdog delay setting at the same time and setting it to its very shortest time setting - so what is happening is that your WDT times out really fast after you have pinged it.

I would use:

WDTCTL = WDT_ARST_1000; //restart WDT, timeout after 1000ms

The reason I wouldn't use |= is that I think that WDTPW when read back from the register, reads back as a different value than the actual password (a security feature to try to prevent accidental WDT setting). So I think |= may actually cause a password violation - I'd have to try this though. If you use = and write the whole register with your correct settings you should definitely be safe though.

One final note - I saw when you initialize the WDT you have it also setting WDTHOLD - this means the timer won't start yet but will wait. Do you start the timer later in your code?

Regards,

Katie

Hi Guys,

Thanks for the responses. I've been doing some more digging and while I don't have the answer yet, I can thell you that things have gotten more complicated. I knew it had to be more than a simple WDT+ issue.

Some how the reboot is associated with the WDT+ and the fact that I am using an External Clock. In my configuration, I have an External Clock (32 kHz) connected to XIN. and am using the XOUT Pin as an I/O (Input). As such, P2SEL.7 is cleared. Upon doing this, the LFXT1OF (fault ) and OFIFG bit is set by the hardware. The hardware then switches the SMCLK and MCLK to the DCO; which is OK because they already use the DCO as the source. When I include the WDT+ periodic reset (using Katies' suggestion, thanks Katy) in my code, I get a reboot. If I do not clear P2SEL.7 (and, therefore am unable to use P2.7 as an input),, everything runs as expected - no reboot. Riddle me that!

I'm not sure I can configure everything as suggested here, but I don't know why. not.

thanks

jdata123 said:

... When I ping the Watchdog on the 2013, the Software restarts ..

When you ping, you probably stopped the CPU and hence not kicking the WDT periodically any more But the ACLK keeps ticking and your WDT will bark.

(I do not know exactly what ping means.)

Hi jdata123,

It sounds like maybe something is off with your clock configuration. You mentioned that you source the F2013 ACLK (and WDT+) from an external signal that you are generating on an F5529. This means you need to use the LFXT1 not in crystal mode, but set up for an external clock source. Maybe your settings are currently set up as if using a crystal - hence the oscillator fault when you try using your XOUT pin for another function.

According to the User's Guide:

2xx User's Guide said:

LFXT1 may be used with an external clock signal on the XIN pin in either LF or HF mode when LFXT1Sx = 11, OSCOFF = 0, and XCAPx = 00. When used with an external signal, the external frequency must meet the data sheet parameters for the chosen mode. When the input frequency is below the specified lower limit, the LFXT1OF bit may be set preventing the CPU from being clocked with LFXT1CLK.

Do your settings match this? Maybe if you provide a code snippet of your clock initialization and port initialization for the XIN/XOUT pins we might see what is happening.

Regards,

Katie

Okay, Thanks again. Here's some code:

Basic Clock (Initialization):

void initBasicClock(void)

{

  // ACLK = 4.096 kHz

  // SMCLK = 2 MHz

  // MCLK = 8 MHz

  DCOCTL = CALDCO_8MHZ;     // DCO = 8 MHz

  BCSCTL1 = CALBC1_8MHZ | DIVA_3;     // 32 kHz divided by 8 for WDT+; XTS = 0

  BCSCTL2 = SELM_0 | DIVM_0 | DIVS_2;     // Use DCO for MCLK, Divide by 1; DCO for SMCLK, Divide by 4

  BCSCTL3 = LFXT1S_3 | XCAP_0;     // External Clock; XCAP = 00

}

Also, I would like to turn the Oscillator off in the Status Register. Any ideas how?

Forgot the Port Initialization in the last post.

// **** Digital I/O Control ****

void initDigitalIO(void)

{

// Port 1

P1SEL = BIT0 + BIT1 + BIT2 + BIT3 + BIT6 + BIT7;

P1DIR = 0;

P1REN = BIT4 + BIT5;

P1OUT = BIT4 + BIT5;

P1IE = 0;

P1IES = 0;

P1IFG = 0;

// Port 2

P2SEL &= ~(BIT7);;

P2DIR = 0;

P2REN = 0;

P2OUT = 0;

P2IE = 0;

P2IES = 0;

P2IFG = 0;

}

You forgot: P2SEL |= BIT6:

Thanks for the reminder. I will put this statement in the code; however, the hardware sets BIT6 upon power up/reset.

dave

Tyler Witt said:

WDTCTL |= WDTPW+WDTCNTCL

The correct term is

WDTCTL = (WDTCTL &0xff) | WDTPW |WDTCNTCL;

However, the init sets WDTHOLD, so there is no need to clear the WDT, it is inactive anyway. When doing the original assignment, WDTHOLD is implicitly cleared, but also the delay setting, the clock setting and everything else. WDTCTL is back to power-on defaults. And will probably expire and trigger the reset sooner than expected.