Hello,
I am trying to perform a multiplication of two 16 bit unsigned numbers using the Multiplier. Sounds simple, right. So I am doing this at the chip level via the JTAG port using waveforms from an automated tester.
Anyway, I am setting the MPY register 0x0130h to 8000h and the OP2 register 0x0138h to 8000h. I toggle MCLK a few times and get RESLO(0x013Ah) = 7F80h, RESHI(0x013C) = 4000h, and SUMEXT(0x013E) = 0000h.
The issue is the RESLO should be 0000h. It is essentially off by little less than one. Basically 8001h x 8000h - 80h = 40007F80h.
Any ideas what might be happening. Here is my JTAG command sequence (The second value on some of the DR_SHIFT16 commands are the value that I am comparing against):
ResetTAP
IR_SHIFT("IR_CNTRL_SIG_16BIT")
DR_SHIFT16(0x2C01) : Apply Reset
DR_SHIFT16(0x2401) : Remove Reset
ClrTCLK
SetTCLK
ClrTCLK
SetTCLK
ClrTCLK
IR_SHIFT("IR_ADDR_CAPTURE") : read JTAG ID
SetTCLK
IR_SHIFT("IR_CNTRL_SIG_CAPTURE") : Wait for CPU in instr fetch state
DR_SHIFT16(0x0000)(0x2681)
ClrTCLK
SetTCLK
IR_SHIFT("IR_DATA_16BIT")
DR_SHIFT16(0xC232) : "DINT" Disable Interrupt
ClrTCLK
SetTCLK
IR_SHIFT("IR_CNTRL_SIG_CAPTURE") : Wait for CPU in instr fetch state
DR_SHIFT16(0x0000)(0x2681)
ClrTCLK
SetTCLK
IR_SHIFT("IR_DATA_16BIT")
DR_SHIFT16(0x4303) : "NOP"
ClrTCLK
SetTCLK
IR_SHIFT("IR_CNTRL_SIG_CAPTURE") : Wait for CPU in instr fetch state
DR_SHIFT16(0x0000)(0x2681)
ClrTCLK
SetTCLK
IR_SHIFT("IR_DATA_16BIT")
DR_SHIFT16(0xC312) : "CLRC"
ClrTCLK
SetTCLK
IR_SHIFT("IR_CNTRL_SIG_CAPTURE") : Wait for CPU in instr fetch state
DR_SHIFT16(0x0000)(0x2681)
ClrTCLK
SetTCLK
IR_SHIFT("IR_DATA_16BIT")
DR_SHIFT16(0x3FFF) : "JMP $" instruction to keep CPU from changing the state
ClrTCLK
IR_SHIFT("IR_CNTRL_SIG_16BIT")
DR_SHIFT16(0x2409) : set HALT_JTAG bit
SetTCLK
ClrTCLK
IR_SHIFT("IR_CNTRL_SIG_16BIT") : Disable Watchdog
DR_SHIFT16(0x2408) : Set to Write
IR_SHIFT("IR_ADDR_16BIT")
DR_SHIFT16(0x0120) : Set Watchdog Control Register Address
IR_SHIFT("IR_DATA_TO_ADDR")
DR_SHIFT16(0x5A80) : Write to Watchdog Control Register
ClrTCLK
SetTCLK
IR_SHIFT("IR_CNTRL_SIG_16BIT")
DR_SHIFT16(0x2408) : Set to Write
IR_SHIFT("IR_ADDR_16BIT")
DR_SHIFT16(0x0130) : Set Operand One - Multiply MPY for 16x16 Unsigned Multiply
IR_SHIFT("IR_DATA_TO_ADDR")
DR_SHIFT16(0x8000) : Write to MPY 8000
SetTCLK
ClrTCLK
IR_SHIFT("IR_CNTRL_SIG_16BIT")
DR_SHIFT16(0x2408) : Set to Write
IR_SHIFT("IR_ADDR_16BIT")
DR_SHIFT16(0x0138) : Set Operand Two - OP2 for 16x16 Unsigned Multiply
IR_SHIFT("IR_DATA_TO_ADDR")
DR_SHIFT16(0x8000) : Write to OP2 8000
SetTCLK
ClrTCLK
SetTCLK
ClrTCLK
SetTCLK
ClrTCLK
SetTCLK
ClrTCLK
SetTCLK
ClrTCLK
IR_SHIFT("IR_CNTRL_SIG_16BIT")
DR_SHIFT16(0x2409) : Set to Read
IR_SHIFT("IR_ADDR_16BIT")
DR_SHIFT16(0x013A) : Set Address for Result Low - RESLO
IR_SHIFT("IR_DATA_TO_ADDR")
SetTCLK
ClrTCLK
DR_SHIFT16(0x0000)(0x0000) : Read Low Word - RESLO
IR_SHIFT("IR_CNTRL_SIG_16BIT")
DR_SHIFT16(0x2409) : Set to Read
IR_SHIFT("IR_ADDR_16BIT")
DR_SHIFT16(0x013C) : Set Address for Result High - RESHi
IR_SHIFT("IR_DATA_TO_ADDR")
SetTCLK
ClrTCLK
DR_SHIFT16(0x0000)(0x4000) : Read High Word - RESHI
IR_SHIFT("IR_CNTRL_SIG_16BIT")
DR_SHIFT16(0x2409) : Set to Read
IR_SHIFT("IR_ADDR_16BIT")
DR_SHIFT16(0x013E) : Set Address for Sum Extension - SUMEXT
IR_SHIFT("IR_DATA_TO_ADDR")
SetTCLK
ClrTCLK
DR_SHIFT16(0x0000)(0x0000) : Read Sum Extension - SUMEXT
SetTCLK
ClrTCLK