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msp430 timer compare time by sowftare

Omri Berg1
Intellectual 1000 points


Hi all,

I'm trying to capture time initiated by software, this is the method I'm using to test this feature but the result I'm getting is always 1 (for the time elapsed), no matter the time I sleep in between

DCO at 1Mhz
Timer uses external osc of 32khz

Here is the code (configuring the clock, timer, and capturing):

BCSCTL3 |= LFXT1S_0 + XCAP_0; // 32768-Hz crystal on LFXT1 + Oscillator capacitor selection
DCOCTL = 0; // Select lowest DCOx and MODx settings
BCSCTL1 = CALBC1_1MHZ; // Set DCO
DCOCTL = CALDCO_1MHZ;

TACTL = TASSEL_1 + MC_1; // ACLK, up mode

TACCTL1 = CM_1 + SCS + CAP + CCIS_2;  //set to rising edge  

TACCTL1 = CM_1 + SCS + CAP + CCIS_3;  //set a rising edge

start_time = TACCR1;
TACCTL1 = CM_1 + SCS + CAP + CCIS_2;

temp_time = g_RTC_secondsCounter;
__delay_cycles(5000);
TACCTL1 = CM_1 + SCS + CAP + CCIS_3;
end_time = TACCR1;
TACCTL1 = CM_1 + SCS + CAP + CCIS_2;
if(temp_time != g_RTC_secondsCounter)
{
end_time += (temp_time-g_RTC_secondsCounter)*32768;
}
total_time = end_time - start_time;

Thanks in advance,

  • 0
    Guru 227245 points

    Omri Berg1 said:
    BCSCTL3 |= LFXT1S_0 + XCAP_0; // 32768-Hz crystal on LFXT1 + Oscillator capacitor selection

    Does teh crystal run at all? You don't follow the required procedure to wait for it to come up.
    If it doesn't run for some reason, the timer won't count (there is no fallback). But even if it does, it will take some time (up to several 100 ms). So your code is maybe already through before the crystal is up.
    Also, after 'arming' the capture registers, you don't wait for any capture.. You must wait for the CCIFG bit to be set inside the TACCTL register before you can proceed.

    And where deos g_RTC_seconds_Counter come from? Does it magically change?

  • 0 in reply to Jens-Michael Gross
    Intellectual 1000 points

    Thanks Jens-Michael, 

    -I havn't seen anything in the sample codes about waiting for the clock to sync, how can I know it's synced and that I'm ready to continue with the executing of the code? 

    - As I haven't set TACCTL1 register with CCIE bit so I figured out that there won't be an interrupt. should I set the CCIE bit and do the reading in the ISR ?

    g_RTC_seconds_Counter incremented in the ISR of the real time clock 


    Thanks 

  • 0 in reply to Omri Berg1
    Guru 227245 points

    Omri Berg1 said:
    I havn't seen anything in the sample codes about waiting for the clock to sync

    Even the users guide proposes code. See the basic clock system chapter in the users guide."fail-safe operation' et al.

    AFAIK, every sample code that uses the eternal crystal also includes the loop that waits for OFIFG to be clear (and not getting set again).

    Omri Berg1 said:
    As I haven't set TACCTL1 register with CCIE bit so I figured out that there won't be an interrupt.

    Right. However, the interrupt flag will be set on the capture event, whether an interrupt is performed or not.
    CCIFG bit, CCIE bit and GIE bit are ANDed to see whether an interrupt shall be performed. But the IFG bits are set either case.
    Don't forget to clear CCIFG before waiting for the next event.

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