Other Parts Discussed in Thread: MSP430F5438A, MSP430F5438
We have an application that is using USCIA1 for PC communication.
USCIA0 for XBEE communication
Development software is IAR 5.40, debugger is MSP430FET-UIF, MCU msp430f5438A.
Development platform is TI MSP430f5438 dev board and also our custom designed board with same MCU.
By the following code below, we init clock module with 12 MHz DCO setting, then usarts etc...
* When we run the code with the debugger, everything works. Although we made this setting;
P11DIR |= 0x07; // ACLK, MCLK, SMCLK set out to pins
P11SEL |= 0x07; // P11.0,1,2 for debugging purposes
we could not measure smclk on regarding pin, we could only see aclk wave form.
* then we deattach the debugger, it continues working
* after a power on reset, uart stops working, then we can not get any respond from the mcu's uart. But at this time a led continues blinking which is toggling in timer0 interrupt.
* after a long investigation, we assumed that smclk stops working after power on reset, because when we make a new configuration for uarts that are using aclk for the clock source, it continues working
/* clock init , 12MHz DCO */
void init_clock(void)
{
P11DIR |= 0x07; // ACLK, MCLK, SMCLK set out to pins
P11SEL |= 0x07; // P11.0,1,2 for debugging purposes.
UCSCTL3 |= SELREF_2; // Set DCO FLL reference = REFO
UCSCTL4 |= SELA_2; // Set ACLK = REFO
__bis_SR_register(SCG0); // Disable the FLL control loop
UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
UCSCTL1 = DCORSEL_5; // Select DCO range 24MHz operation
UCSCTL2 = FLLD_1 + 366; // Set DCO Multiplier for 12MHz
// (N + 1) * FLLRef = Fdco
// (366 + 1) * 32768 = 12MHz
// Set FLL Div = fDCOCLK/2
__bic_SR_register(SCG0); // Enable the FLL control loop
// Worst-case settling time for the DCO when the DCO range bits have been
// changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
// UG for optimization.
// 32 x 32 x 12 MHz / 32,768 Hz = 375000 = MCLK cycles for DCO to settle
__delay_cycles(375000);
// Loop until XT1,XT2 & DCO fault flag is cleared
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
}while (SFRIFG1&OFIFG); // Test oscillator fault flag
}
void init_usart(void)
{
P5SEL |= BIT6 + BIT7 ; //* PC Usart pins, P5.6,7 = USCI_A1 TXD/RXD *//
UCA1CTL1 |= UCSWRST; /* Reset UART. */
UCA1CTL1 = UCSSEL_2; /* Use SMCLK. */
UCA1BR0 = 78; // /* Setup baud rate low byte. */
UCA1BR1 = 0;// /* Setup baud rate high byte. */
UCA1MCTL = UCOS16 + UCBRF_2 + UCBRS_0;
UCA1CTL1 &= ~UCSWRST; /* Take out of reset. */
UCA1IE |= UCRXIE; /* Enable interrupts. */
/* XBEE USART initialisation */
P3SEL |= BIT4 + BIT5; //* XBEE Usart pins, P3.4,5 = USCI_A0 TXD/RXD *//
UCA0CTL1 |= UCSWRST; /* Reset UART. */
UCA0CTL1 = UCSSEL_2; /* Use SMCLK. */
UCA0BR0 = 78; /* Setup baud rate low byte. */
UCA0BR1 = 0; /* Setup baud rate high byte. */
UCA0MCTL = UCOS16 + UCBRF_2 + UCBRS_0;
UCA0CTL1 &= ~UCSWRST; /* Take out of reset. */
UCA0IE |= UCRXIE; /* Enable interrupts. */
}
Looking forward your suggestions.
thanks in advance,
Gloin
