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ADC10 and DTC Synchronization on MSP430G2553 (LaunchPad)

Hello,

I am trying to Sample 2 channels (A3 and A4) on the LaunchPad and use DTC to store the values immediately. The problem I am facing is that these two channels are never stored at the same location in memory. Instead they loop around all locations defined.

Here is my code:

void ADC_Init (void)
{
    ADC10CTL0 = SREF_1 + MSC + REF2_5V + REFON + ADC10ON;
    ADC10CTL1 = INCH_4 + CONSEQ_3;
    ADC10AE0 = 0x18;    // Enable Channel 3 and Channel 4
    ADC10DTC0 = ADC10CT;
    ADC10DTC1 = 0x05;
    ADC10SA = 0x0280;
    ADC10CTL0 |= ENC + ADC10SC;        //Start ADC
}

When I run the code (for Example let's look at Channel 4) the value might be at address 0x0288, then if I run the code and Pause it, it will be at 0x282 (->run -> pause, or a break point) it will be at 0x280 and so on...

I would like to have it up to the point where it stays at the same address at all times.

Thank you.

Viktor.

  • Viktor Tasevski said:
    ADC10DTC1 = 0x05;

    You enabled DTC for 5 transfers (odd number) but you have 2 channels (even number). Use 2 as transfer count and you will be fine. If for some reason you need more than one sample per channel in memory, then use 4 or 6 or 8 transfers.

  • Hi llmars,

    Thank you for the reply...

    The reason ADC10DTC1 = 0x05 is because I am sampling Channel A3 and A4, so the state machine has to go through A4, A3, A2 A1, A0 which is 5 Channels. I also tried setting it to 0x02, but you can still see all 5 channels (A5..A0) interlaced into two memory words, which makes sense because the "MSP430 Series2 User Guide" states for register ADC10CTL1: INCHx - The Highest Channel for a sequence of conversions... Also the State Machine Block Diagram shows a decrement from the highest channel selected to 0 (or A0)...

    Regards,

    Viktor.

  • Viktor Tasevski said:
    When I run the code (for Example let's look at Channel 4) the value might be at address 0x0288, then if I run the code and Pause it, it will be at 0x282 (->run -> pause, or a break point) it will be at 0x280 and so on...

    I'm just guessing here, but I think the problem is with pausing the CPU.

    When you pause the CPU, the DTC is paused too,a s it is sort of a poor-man's DMA and requires a memory bus access. The ADC, however, keeps sampling. The while the System is paused, the DTC will miss an unknown number of ADC results, continuing to copy the last result when you continue running. As soon as you pause the system for longer than the duration of one single conversion, ADC and DTC are getting out of sync.

    You may keep the two in sync by using MCLK as ADC10CLK. You'll get a bad result when you stop MCLK during the conversion phase, as the sampling charge will leak away, but at least ADC and DTC will remain in sync.

    From the users guide:

    "the CPU is halted, if active, for the one MCLK required for the transfer."
    But if there is no MCLK to do the transfer, due to a halted system, then no transfer can happen.

    Yeah, the debugger can be a real bugger if you don't know about its side-effects.

  • Hi Jens-Michael,

    That is exactly what it turned out to be... Thank you very much for your help.

    Regards,

    Viktor.

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