Think there is an init problem on SPI, I am searching now several hours. Code stays on the first
while(UCB0STAT & UCBUSY){} because UCBUSY is set wit the first Tx-Byte an is not cleard by USCI-B
no signals on SIMO SOMI or CLK ! The ISR is never executed !?
Maybe someone can see the bug !?
#include <msp430.h>
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
P1DIR |= BIT0; // ACLK set out to pin
P1SEL |= BIT0;
__bic_SR_register(SCG1+SCG0); // turn off the SCG1 and SCG0 in SR (clear the bits in SR, normally done by a reset)
// ***** Clock initialisieren
// ACLK = 32,768khz; f_DCOCLK = FLLD * (FLLN+1) * (fACLK / n)= MCLK = SMCLK = 1,048576Mhz
UCSCTL1 = DCORSEL_1;
UCSCTL2 = 31; // FLLN0..9 set = (31+1) = 32:1; FLLD = 1:1 -> MCLK = 32 * ACKL = 1,04 Mhz
UCSCTL3 = 0x00; // XT1CLK; 1:1
UCSCTL4 = SELM0 + SELM1 + SELS0 + SELS1
UCSCTL5 = 0x00;
UCSCTL6 = XT2OFF;
UCSCTL7 = 0x00; // clear XT1LFOFFG + DCOFFG Flags
UCSCTL8 = 0x00; // disable all conditiotnal requestsUCB0TXBUF = data;
UCB0CTL1 = UCSWRST; // disable USCI
P6OUT |= BIT3; // set P6.3 = /CS_DAC to not selected
P6DIR |= BIT3; // Set P6.3 to output direction
P2SEL |= BIT1 | BIT2 | BIT3; // Set Portpins to SPI function
P2DIR = 0xE4; // IIIOOIOO 1110 0100 // 1=OUT, 0=IN
UCB0CTL0 = UCCKPH + UCMSB + UCSYNC; // 3-pin, 8-bit; SPI master; MSB first; Syncron Mode
UCB0CTL1 |= UCSSEL_2; // SMCLK 1,04 Mhz
UCB0BR0 = 0x02; // /2
UCB0BR1 = 0; //
UCB0CTL1 &= ~UCSWRST; // Enable USCI Logic
UCB0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
__enable_interrupt();
while(1)
{
P6OUT &= ~BIT3; // select DAC by clear P6.3
UCB0IE |= UCTXIE; // Enable USCI_A0 RX interrupt
UCB0TXBUF = 0x04; // Transmit first character
while(UCB0STAT & UCBUSY){}
UCB0TXBUF = 0x55; // Transmit character
while(UCB0STAT & UCBUSY){}
UCB0TXBUF = 0xAA; // Transmit character
while(UCB0STAT & UCBUSY){}
P6OUT |= BIT3; // unselect DAC by set P6.3
__delay_cycles(200);
}
}
#pragma optimize = speed high
#if defined __IAR_SYSTEMS_ICC__ || defined __CCS_V4__
#pragma vector=USCI_B0_VECTOR
__interrupt void USCI_B0_Interrupt( void )
#else
interrupt [USCI_B0_VECTOR] void USCI_B0_Interrupt( void )USCI_B0_VECTOR // (55 * 2u) /* 0xFFEE USCI B0 Receive/Transmit */
#endif
{
char test=0;
switch(__even_in_range(UCB0IV,8))
{
case 0x00: // Vector 0: No interrupts
break;
case 0x02: // Vector 2: UCRXIFG
break;
case 0x04: // Vector 4: UCTXIFG
test++;
break;
case 0x06: // Vector 6: UCSTTIFG
break;
case 0x08: // Vector 8: UCTXCPTIFG
break;
default:
break;
}
}