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Check if MSP is in LPM4

Kristofer Klein
Prodigy 60 points

Hi

 

I have a small problem that I need help with. In my program I put the MSP in LMP4, with port 1 interrupt enabled. In this interrupt I need to know if the MSP is going to return to LPM4 or if it is in normal (active) state. The port 1 interrupt is also enabled when the program is running.

 

Is there any register I can check if the MSP is to return to LPM4, or is the easiest way just to have a global variable that tells me what kind of stat the MSP is running (LPM4/Active)?

  • 0
    TI__Guru 56650 points

    Kristofer,

    Do you need also the P1 interrupt on active mode? If not, the easiest way is to activate the P1 interrupt before you go into LPM4 (but need to make sure the the P1 enable interrupt is atomic - i.e. GIE is disabled during that activation of P1 interrupt).

    If you still also need the P1 interrupt during active mode, i guess the easiest way is to use global variable. But again setting the global variable which i guess is done right before entering LPM4 and going to the LPM4 needs to be atomic (GIE disabled).

  • 0
    Guru 227245 points

    There are three ways to detect it. First, your main code may set a flag before entering LPM. The ISR can then check the flag. While not being 100% safe (the interrupt may come after setting the flag but before actually entering LPM), it is the easiest way.

    The second method is checking the LPM bis in the status register copy on the stack. However, in C you don't know where on stack this copy is. I don't know whether the compiler provides an intrinsic to read the copy. (I only know the intrinsics to clear or set bits on it: BIC/BIS_SR_register_on_exit). If it exists, this will be the 'best' way.

    On 5x family (and maybe 4x), the FLL control bit can be used. When entering LPM, the FLL is usually disabled, and won't be enabled when waking up from LPM. So the SCG0 bit is set when the CPU was in LPM while it would be clear if the CPU was active (assuming that the FLL wasn't disabled in active mode but is disabled when entering LPM). AFAIK, SCG0 is part of the LPM4_bits. This should only be used as a workaround if the second option is not available and the first isn't secure enough.

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