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Apply Luhn algorithm on flash functionality

I would like to put checksum on my flash read to see if I am seeing right numbers on my display or not. It is said that Luhn Algorithm is a useful one. In your opinion what is the good method to apply?

http://en.wikipedia.org/wiki/Luhn_algorithm

  • CRC16 is better, as with Luhn two wrong numbers could still create a good checksum

    http://en.wikipedia.org/wiki/Cyclic_redundancy_check

    http://www.ti.com/lit/an/slaa221/slaa221.pdf

  • Oh cool! Seems a good article to investigate on! Thanks!

  • A base-10 checksum is a non-obvious match for a (base-256) flash.

    Phil Koopman at CMU has done some very impressive research into CRCs. Among his results: (1) The polynomial makes a big difference (2) Many of the common CRCs (CCITT-16, CRC-16 (2 flavors) et al) are not very good. One of his papers has a table of CRC polynomials with measurements of their actual effectiveness (multiple criteria). If you don't have to match a standard, I suggest you pick one from his table.


    For cheapskates like me, he has also analyzed a number of (computationally simpler) checksums. Here again, small algorithm differences make a big difference, and more-complex is not necessarily better.

  • Some of the compiler/linker will generate CRC (or other checksum) and include that in the Flash image. Some of the MSP430 chips have CRC module.

    Also Flash Marginal Read option can detect Flash defects before they show up in normal Read.

  • These guidelines should serve as a starting point for making informed design choices:

    . Never use an XOR checksum when it is possible to
      use a two’s complement addition checksum (or
      something even better).

    . Use a one’s complement addition checksum in
      preference to a two’s complement addition checksum
      for random independent bit errors.

    . Use a two’s complement addition checksum in
      preference to a one’s complement addition checksum
      for burst errors. If both burst and random independent
      bit errors matter, one’s complement is probably
      the better choice.

    . If computational resources are available, use a
      Fletcher checksum in preference to one’s complement
      or two’s complement addition checksums to
      protect against random independent bit errors. Do
      not use a Fletcher checksum if burst errors are the
      dominant fault expected and data consists predominantly
      of continuous strings of all zeros or all ones.

    . If computational resources are available, use a CRC
      instead of any of the other checksums mentioned. It
      is generally better for both random independent bit
      errors and burst errors.

  • old_cow_yellow said:

    Some of the compiler/linker will generate CRC (or other checksum) and include that in the Flash image. Some of the MSP430 chips have CRC module.

    Also Flash Marginal Read option can detect Flash defects before they show up in normal Read.

    Meaning that I do not need to use a check-sum to get the errors then?

  • Cool Tony! Thanks!

  • Bruce McKenney47378 said:

    A base-10 checksum is a non-obvious match for a (base-256) flash.

    Phil Koopman at CMU has done some very impressive research into CRCs. Among his results: (1) The polynomial makes a big difference (2) Many of the common CRCs (CCITT-16, CRC-16 (2 flavors) et al) are not very good. One of his papers has a table of CRC polynomials with measurements of their actual effectiveness (multiple criteria). If you don't have to match a standard, I suggest you pick one from his table.


    For cheapskates like me, he has also analyzed a number of (computationally simpler) checksums. Here again, small algorithm differences make a big difference, and more-complex is not necessarily better.

    Oh, then you do not recommend CRC! 

  • CaEngineer said:

    Also Flash Marginal Read option can detect Flash defects before they show up in normal Read.

    Meaning that I do not need to use a check-sum to get the errors then?

    [/quote]

    If marginal read is supported on target device it can be executed on 1 MHz. It is possible to compare marginal read contest vs read contest (full speed), and get problematic location (address). My flasher using CRC (hardware module) also for marginal read.

    D:\msp430>flash -p com21 -f sbw_test_192r.txt -e -ws -v -crc -mr

    File: "sbw_test_192r.txt"
    Address: 05C00  Words: 98304
    Size: 196608 bytes

    Get Device
    # JTID Fuse Device Core Hard Soft LotWafer DieX DieY
    0  91   OK   5435  0100  10   10  ADE98146 0400 2000
    1  91   OK   5435  0100  10   10  ADE98146 0A00 2100

    Erase

    Write Smart
    Time: 992 ms  Speed: 193,5 KB/s

    Verify
    Time: 881 ms  Speed: 217,8 KB/s

    CRC Calculation
    File  #0   #1
    5D40 5D40 5D40
    Time: 103 ms  Speed: 1.848,6 KB/s

    Marginal Read
         File  #0   #1
    MR0: 5D40 5D40 5D40
    MR1: 5D40 5D40 5D40
    Time: 2087 ms  Speed: 92,0 KB/s

    Release Device

    Total Time: 4375 ms

    D:\msp430>
  • BTW, there is presentation document with flash checking (CRC / marginal read)

    http://focus.ti.com/en/download/mcu/Flash-Techniques-Designing-for-System-Robustness.pdf

  • zrno soli said:
    D:\msp430>flash -p com21 -f sbw_test_192r.txt -e -ws -v -crc -mr

    File: "sbw_test_192r.txt"
    Address: 05C00  Words: 98304
    Size: 196608 bytes

    Get Device
    # JTID Fuse Device Core Hard Soft LotWafer DieX DieY
    0  91   OK   5435  0100  10   10  ADE98146 0400 2000
    1  91   OK   5435  0100  10   10  ADE98146 0A00 2100

    Erase

    Write Smart
    Time: 992 ms  Speed: 193,5 KB/s

    Verify
    Time: 881 ms  Speed: 217,8 KB/s

    CRC Calculation
    File  #0   #1
    5D40 5D40 5D40
    Time: 103 ms  Speed: 1.848,6 KB/s

    Marginal Read
         File  #0   #1
    MR0: 5D40 5D40 5D40
    MR1: 5D40 5D40 5D40
    Time: 2087 ms  Speed: 92,0 KB/s

    Release Device

    Total Time: 4375 ms

    D:\msp430>

    zrno soli, I wonder where you got this report from? IAR IDE reports like this?

  • CaEngineer said:

    zrno soli, I wonder where you got this report from? IAR IDE reports like this?

    No, this is PC side of SBW+ flasher I'm working on, MSP-GANG like.

    http://forum.43oh.com/topic/2972-sbw-msp430f550x-based-programmer

  • zrno soli said:

    zrno soli, I wonder where you got this report from? IAR IDE reports like this?

    No, this is PC side of SBW+ flasher I'm working on, MSP-GANG like.

    http://forum.43oh.com/topic/2972-sbw-msp430f550x-based-programmer

    [/quote]

    I see! 

  • old_cow_yellow said:

    Some of the compiler/linker will generate CRC (or other checksum) and include that in the Flash image. Some of the MSP430 chips have CRC module.

    Also Flash Marginal Read option can detect Flash defects before they show up in normal Read.

    OCY! Where can I check this in my IAR IDE? I have the followings when I look for the word "checksum"!

    Also CRC I guess it is said only for TX-RX serial communications!

  • old_cow_yellow said:

    Wow! You are awesome OCY! I have not noticed that my IDE has such option! Many thanks!

  • OCY!

    Do you know why the following article shows me a window which is different from the one that you showed me above?

    In the following document it is said that the version that they use is 5.2 but I installed the latest version and I have no ability to put the begin-end address!

    http://www.iar.com/Global/Resources/Developers_Toolbox/Building_and_debugging/Creating_an_absolutely_placed_checksum-protected_library_ARM.pdf

    Have you yourself worked with Checksum option before?

  • Obviously there is a difference between the IAR Tools for ARM and for MSP430!

    I wonder if there are plans to update the 430 with the additional options you are pointing out...

  • Todd Anderson78572 said:

    Obviously there is a difference between the IAR Tools for ARM and for MSP430!

    I wonder if there are plans to update the 430 with the additional options you are pointing out...

    Oh! You are absolutely right! It is for sure not assigned for MSP430! Thank you!

  • CaEngineer said:
    OCY! ... Have you yourself worked with Checksum option before?

    Yes, the linker moved all the code and constant to slightly higher address to make room for the check-sum, filled all the unused FLASH, calculated the check-sum and stored it at the low-address. The check-sum covered all the FLASH except itself.

  • old_cow_yellow said:

    Yes, the linker moved all the code and constant to slightly higher address to make room for the check-sum, filled all the unused FLASH, calculated the check-sum and stored it at the low-address. The check-sum covered all the FLASH except itself.


    BTW, my flasher use target device RAM, but it is totally transparent (complete memory for all operations on target device) to user side, so write / verify / crc ... can be executed on complete target device memory RAM / FRAM / Flash.

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