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MSP430F2012 on 16 MHz

Other Parts Discussed in Thread: MSP430F2012

Hallo!

How i need setup MSP430f2012 (2013) to work on 16 MHz from internal oscillator.

#include "io430x20x3.h"

#define CLK  P1OUT_bit.P1OUT_7

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;
  BCSCTL1 = CALBC1_16MHZ;
  DCOCTL = CALDCO_16MHZ;
 
  P1DIR |= 0xE3;
  P1REN |= 0x1C;
 
  CLK ^= 1;
  CLK ^= 1;

}//main

This program generate one pulse. Duration of impulse must be 62.5 ns on 16 MHz, but it was 1.25 us.

  • Hi Mikhail,

    wenn running the MSP430F2012 at 16MHz the instruction cycle time (time needed for executing one instruction) is 62.5ns (1/16MHz).

    Since you're using the IAR IDE this could be a problem with the optimization level since your bit-set (BIS) /bit-clear (BIC) instruction needs more than one cycle to be executed.
    So, have a look at the opimization level you're currently using and pls try the macro below.

    #define TOGGLE_CLK     P1OUT ^= BIT7;

    Use the macro as usual (i.e. TOGGLE_CLK; // toggle BIT7 of P1OUT).
    Rgds
    aBUGSworstnightmare

  • You need to read the fine print.

    Some of the machine instructions take 1 MCLK to execute. Some take 2. Some take 3. Some take 4. Some take 5. ...Etc.

    (This has nothing to do with compiler or optimization.)

  • Hi old cow yellow,

    you're right! But correct me if I'm wrong: BIC and BIS are single-cycle instructions.

    Have a look at the disassembly to see what the resulting assembly code from the C instruction is.

    Rgds
    aBUGSworstnightmare

  • BIC.B #BIT0,R15 ; takes 1 cycle

    BIC.B #BIT7,R15 ; takes 2 cycles

    BIC.B #BIT0,&P1OUT ; takes 4 cycle

    BIC.B #BIT7,&P1OUT ; takes 5 cycles

     

  • Hi old cow yellow,

    thanks for sharing this information - I wasn't aware of that! Do you have a explanation why it takes one more cycle to clear BIT7 and why does it take at least 4 cycles to set a bit in the I/O registers. Other MCUs allow read-modify-write in one clock cycle (Atmel AVR i.e.).

    Where to find the information who long a instruction takes?

    Rgds
    aBUGSworstnightmare 

  • Each instruction cycle length is determined by the addressing mode that is used for that instruction. There are seven addressing modes to choose from. Please see section 3.4.4 of the 1xx User's Guide for a more detailed description.

    In addition both supported software tools (IAR and CCE) have cycle counters in the debugger such that you can determine each C or Assembly instruction's cycle count. Please also note that if using the cycle counter in IAR the dissasembly window needs to be open and to access the counter choose Registers under the View menu. The Cycle Counter is viewable with the CPU Registers. Once the number of cycles is known the timing can be determined based on your operating frequency.

    Depending on how many cycles an instruction takes to execute, it will take: (# of cycles)*(CPU speed in us). For example if an instruction takes 3 cycles, it will take: 3*1us=3 us to execute at 1 Mhz CPU speed. A NOP is a single cycle instruction, so it will only take 1 us to execute at 1 MHz CPU speed.

    For information on instruction times please see pages 3-72 and 3-73 of the 2xx User's Guide.

  • Thank you very much!

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