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Problem with SR flags set using CMP instruction

I can't figure why the CMP instruction sets some of the flags in the SR.

For Instance: CMP.W #25001,&int

int is 0x9010. The only bit set in the status register is N. Shouldn't there be a carry bit set? I'm jumping on a JLO when it should fall straight through as &int is much larger than 25001.

Thanks.

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