Other Parts Discussed in Thread: MSP430F5438A
Hai every one,
I am trying to communicate between two MSP430F5438a using I2C protocol. One controller i make it as a Master and another controller make it as a Slave.
i am sending data from slave to master.
But i unable to see the data in master, what ever i send data from slave.
my code for Master:
#include <msp430f5438a.h>
#include <stdio.h>
unsigned int RXData;
unsigned char RXCompare;
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P3SEL = BIT7; // P3 selcted as I2c input(SDK)
P5SEL = BIT4; // P5 Selected as I2c output(SCK)
P1DIR |= BIT0;
UCB1CTL1 |= UCSWRST; // Enable SW reset
UCB1CTL0 = UCMST + UCMODE_3 + UCSYNC; // I2C Master, synchronous mode
UCB1CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK
UCB1BR0 = 12; // fSCL = SMCLK/12 = ~100kHz
UCB1BR1 = 0;
UCB1I2CSA = 0x48; // Slave Address is 048h
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB1IE |= UCRXIE; // Enable RX interrupt
RXCompare = 0x0; // Used to check incoming data
while (1)
{
while (UCB1CTL1 & UCTXSTP); // Ensure stop condition got sent
UCB1CTL1 |= UCTXSTT; // I2C start condition
while(UCB1CTL1 & UCTXSTT); // Start condition sent?
UCB1CTL1 |= UCTXSTP; // I2C stop condition
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0, enable interrupts
__no_operation(); // For debugger
}
}
// USCI_B0 Data ISR
#pragma vector = USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
switch(__even_in_range(UCB1IV,12))
{
case 0: break; // Vector 0: No interrupts
case 2: break; // Vector 2: ALIFG
case 4: break; // Vector 4: NACKIFG
case 6: break; // Vector 6: STTIFG
case 8: break; // Vector 8: STPIFG
case 10: // Vector 10: RXIFG
RXData = UCB1RXBUF; // Get RX data
P1OUT |= BIT0;
printf("\n %d",RXData);
__bic_SR_register_on_exit(LPM0_bits); // Exit active CPU
break;
case 12: break; // Vector 12: TXIFG
default: break;
}
}
My slave code:
#include <msp430f5438a.h>
unsigned int TXData;
unsigned char i=0;
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
// Assign I2C pins to USCI_B0
P5SEL |= BIT4; // Master I2C Clock
P3SEL |= BIT7; // Master I2C Data
P1DIR |= BIT0;
UCB1CTL1 |= UCSWRST; // Enable SW reset
UCB1CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode
UCB1I2COA = 0x48; // Own Address is 048h
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB1IE |= UCTXIE + UCSTTIE + UCSTPIE; // Enable TX interrupt
// Enable Start condition interrupt
TXData = 0; // Used to hold TX data
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/ interrupts
__no_operation(); // For debugger
}
// USCI_B0 State ISR
#pragma vector = USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
switch(__even_in_range(UCB1IV,12))
{
case 0: break; // Vector 0: No interrupts
case 2: break; // Vector 2: ALIFG
case 4: break; // Vector 4: NACKIFG
case 6: // Vector 6: STTIFG
UCB1IFG &= ~UCSTTIFG; // Clear start condition int flag
break;
case 8: // Vector 8: STPIFG
TXData++; // Increment TXData
UCB1IFG &= ~UCSTPIFG; // Clear stop condition int flag
break;
case 10: break; // Vector 10: RXIFG
case 12: // Vector 12: TXIFG
UCB1TXBUF = TXData; // TX data
P1OUT |= BIT0;
break;
default: break;
}
}
please help me out.
