ADC output problem

Akshay Deshpande said:

Theoretically I get the correct reading. But practically there is lot of fluctuation at the output of ADC. To reduce this, I tried averaging the readings. But I do not see any significant change in the output. What can be the problem ? How can it be resolved?

Read and store 100 samples. Sort samples from smaller to higher value. Result will be average value from 8 mid samples. Depending on input (impedance), small cap on input can improve reading stability.

Akshay Deshpande said:

But the problem is that there is some drop in voltage at the output of ADC.

ADC output can't have any drop. Most probably it's your circuit or ADC offset that causes less than expected output.

Akshay Deshpande said:

But practically there is lot of fluctuation at the output of ADC.

Please define fluctuations, range of them.

When you get noise in ADC output - you have to ensure that you have correct anti-aliasing filter in the ADC input circuit. Please tell input circuit, signal and it's source properties and ADC sample rate.

In addition to what has been said already, the ADC doesn’t have unlimited input impedance. It charges a capacitor array for the conversion. The charge process depends on signal output impedance. Unless your output impedance is next to zero (and it likely isn’t), you need some sampling time to get a valid sample. See the users guide, there’s a chapter about the inputs and timing considerations.

Input circuit to ADC is output from the OpAmp(IC 8034), voltage follower (for Ex : output from the opamp is 0.418V) that is fed input to the microcontroller ADC12 bit (MSP430F5435) frequency set is 8MHz the adc output i should get is 684 digital value but fluctuation i am getting is between  600 to 700 digital value 

Regarding opamp: 80MHz is 100-fold overkill. You don't need such a bandwidth for 400ksps ADC. Also it's 5V part. Low voltage CMOS opamp (like this) is fine, you can power it from AVCC rail of msp430.

8MHz ADC clock is out of specification and ADC indeed can give unexpected output values. Try using internal ADC clock (ADC12OSC), check results.

UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
UCSCTL1 = DCORSEL_5; // Select DCO range 16MHz operation
UCSCTL2 = FLLD_1 + 249; // Set DCO Multiplier for 8MHz

here i am using internal clock of adc which is set to 8 MHz

Akshay Deshpande said:

here i am using internal clock of adc

You are not. You can't set frequency of internal ADC oscillator because it's fixed! Please refer to user's manual, adc12 chapter. Also please read datasheet, check ADC clock allowed frequency range.

8MHz ADCCLK is out-of-spec for the ADC12. The limit is ~6MHz (see datasheet) and that’s what MODOSC (the default clock) provides. A too-high clock speed (as well as a too-low speed) makes the ADC readings not reliable.
Also, the sampling time affects the readings. Keep in mind that the ADC is taking snapshots of the input signal. It does not average. So if the sampling gate is open when a spike comes in, the spike voltage is reported, even if the average voltage is lower. You’re also reading ripples on the input (or on the analog supply voltage). Averaging won’t always nullify them. It depends on the relation of frequencies.