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Designing External interrupts for MSP430F5529

mandar malve
Prodigy 100 points

Other Parts Discussed in Thread: MSP430F5529

Hello Everyone,

                            I want to design a microcontroller based board in which I have to interface the accelerometer ADXL362 of analog devices. The accelerometer gives two interrupts as the status of the readings. Now I don't find any section regarding the interrupts in MSP430F5529 datasheet. Also I am new to the MSP430 series of micocontrollers which I came across finding different microcontrollers which can work in ultra low power for wireless solutions but I am unable to find the section where it is mentioned that we can use a particular set of pins for external interrupts. Also can we use any GPIO's as a chip select for SPI slave device.

Regards

Mandar 

  • 0
    TI__Guru 56650 points

    Mandar,

    you can check the code examples for MSP430F5529:

    http://www.ti.com/lit/zip/slac300

    there you can find example codes for both GPIO interrupt and SPI slave.

  • 0 in reply to Leo Hendrawan
    Prodigy 100 points

    Dear Leo hendrawan,

                                             Actually I want to design the hardware in which I have to route a set of  external interrupts to the MSP430F5529 and to which pins I can route them is not mentioned in the data sheet. So if that is made clear then some of my design issues will be solved.  The solution you provided is useful but it will be needed further when i will write my software.

    Regards

    Mandar 

  • 0 in reply to mandar malve
    TI__Guru 56650 points

    Hi,

    sorry, i have misunderstood your question. Please refer then to the MSP430F5529 device specific datasheet - http://www.ti.com/lit/ds/symlink/msp430f5529.pdf. Starting at page 4, you can find the functional block diagram of the device and also the pin assigment (Table 3). For GPIO interrupt you can choose any pin from P1 and P2. For SPI, you can choose either to use P3.0-P3.3, or any pin in P4 using the Port Mapping Controller.

  • 0
    Guru 227245 points

    In addition to what Leo wrote, yes, you can use any GPIO pin for chip select. The SPI hardware doesn’t care for chip selection. (don’t use 4-wire SPI mode; the 4th STE pin is not meant for chip selection). The reason is that chip select is partly part of the high-level protocol (begin of a datagram) of which the SPI hardware has no knowledge. It’s use and effect depends on the slave. For the same reason, the chip select in slave mode also needs to be handle by GPIO (best with an interrupt-capable GPIO pin). The STE pin is only supplementary to shut-off the slave output immediately when de-selected. But since it doesn’t trigger any interrupt, the software still needs to handle the de-selection effect on the high-level protocol, and perhaps reset the USCI.

  • 0 in reply to Jens-Michael Gross
    Prodigy 100 points

    Hi Michael,

                       Thank you for the suggestion regarding SPI but I will be using the 4-wire communication as required by the Slave. The STE pin is anyways will not be used for chip selection as it can be used as SPI Clock and why should we use the chip select pin as any GPIO with interrupt is not understood.

  • 0 in reply to Leo Hendrawan
    Prodigy 100 points

    Hi Leo, 

                    Thank you for your suggestions now I have got better understanding. 

  • 0 in reply to mandar malve
    Guru 227245 points

    mandar malve said:
    The STE pin is anyways will not be used for chip selection as it can be used as SPI Clock

    If STE isn’t used, then there is no difference between 3-wire and 4.-wire SPI. And if you use SPI for USCIA and USCIB, 4-wire mode is disabled/ignored anyway (as there are only 6 signal lines in total).

    mandar malve said:
    why should we use the chip select pin as any GPIO with interrupt is not understood.

    If you are SPI slave, you surely want to know when the master is selecting you, so you can ASAP prepare the first data byte for the answer. You also might want to enable the MISO pin output, as you must not have this output active when not selected.
    When the first clock edge arrives form the master, it is too late. That’s why an interrupt-capable port pin should be used.
    If you are SPI master, you don’t need and can’t use 4-wire SPI at all and you don’t need interrupt capabilities on the CS pins. However, some slaves signal readiness by an independent interrupt line (e.g. ADC data ready) For this (which has nothing to do with SPI then) an interrupt-capable port pin might be a good idea too, unless you want to constantly poll the port for this signal (or want to ignore it)

  • 0 in reply to Jens-Michael Gross
    Prodigy 100 points

    Hi Michael,

                        Thanks for the description about SPI pins between the master and the slave. But I am still not completely convinced about the pin STE, its description is written as Slave Transmit Enable for eg.

    P2.7/UCB0STE/UCA0CLK : General-purpose digital I/O with port interrupt, Slave transmit enable – USCI_B0 SPI                                                      mode, Clock signal input – USCI_A0 SPI slave mode, Clock signal output –                                                                       USCI_A0 SPI master mode

    Here it is described as the pin P2.7 can be a slave transmit enable or a clock output or input(depending upon the configuration i.e. master or slave respectively). So it can be used as a chip select pin for the slave or as a SPI clock output if we are using a master mode for the controller. But if we are using it as a chip select pin then which pin should we select as an SPI Clock. If we are using a 3- wire communication then we can use that pin as a SPI clock output from the master but if our slave is using a 4- wire SPI mode then which pins should we select as a SPI clock and which one to select the Chip select pin.

    Jens-Michael Gross said:
    If you are SPI master, you don’t need and can’t use 4-wire SPI at all
    are you sure that we can't use 4-wire SPI at all for the SPI master because for the other families of micro-controllers we use 4 pins and for the 3-wire SPI we don't use chip select pin. 

      

                                                            

  • 0 in reply to mandar malve
    Guru 227245 points

    The term ‘4-wire’ has nothing to do with using or not using a chip select line for selecting your SPI slave. If you have two slaves, you’ll need two CS lines (5 wires in total, 6 if you count GND) and would still use 3-wire mode.
    The STE signal that is the 4th wire in 4-wire mode has only two purposes: switch the master into slave mode in a multi-master system, and disable the slave output in slave mode.
    If you are single master, ignore the existence of STE and use 3-wire mode. That’s it.

  • 0 in reply to Jens-Michael Gross
    Prodigy 100 points

    Hi Michael,

                        Now I am getting a clear picture of what is to be done but the explanation you gave about the pin STE is not at all mentioned in the data sheet so how come we will come to know that which pin is used for which purpose. So from the data sheet the pin P2.7 is Slave transmit enable – USCI_B0 SPI mode/ Clock signal input – USCI_A0 SPI slave mode/ Clock signal output – USCI_A0 SPI master mode, so from the above options we can select the Clock signal output – USCI_A0 SPI master mode as we want our controller to be in master mode and I want to interface two slave SPI Devices and one device using I2C configuration.

  • 0 in reply to mandar malve
    Guru 227245 points

    Explanation of STE is given in the users guide, where the functionality of the USCI module is explained. The data sheet only tells you the pin mapping, with the terms of the users guide. Not the (logical) meaning.

    It’s the job of the datasheet, to tell you that P2.7 (digital I/O) and USCI_B0_STE (USCI module) are on the same physical pin (and which pin it is), but it is not the job of the datasheet to tell you what P2.7 means and how you use it.
    it’s wrong to say that “pin P2.7 is slave transmit enable”.  Correct is that “the STE signal is available on the same physical pin as P2.7 digital I/O”. On MSPs with port mapping controller, this connection can be changed at will. But even on those without, the same signal can be available on multiple pins (e.g. TA0.0 often is available on 2 or even three pins).

    In the setup you described, you run the USCI in 3-wire SPI mode as master, and need two GPIO signals to select the slaves. I2C is independent., you shouldn’t use the same USCI for both – while SPI won’t mind I2C transfers on the same lines as long as no slave is selected, and connected I2C slaves might misinterpret the SPI data and interfere. But of course you can use USCIA0 for SPI and USCIB0 for I2C.

  • 0 in reply to Jens-Michael Gross
    Prodigy 100 points

    Thanks Michael can you share the link for the Users Guide.

  • 0 in reply to mandar malve
    Guru 227245 points

    Different users guides are available for different MSP families. A link to the one that describes the hardware modules present in any (but not necessarily in every) of the family’s devices is found on each MSP’s product page.

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