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I2C slave "ping"

Gary Cordelli
Prodigy 90 points


I note that TI suggests a method for "pinging" slaves on the I2C bus (e.g., for "discovery" feature) wherein interrupts are disabled globally and both the start and stop conditions are asserted with UCBxI2CSA set to the slave address being "pinged", the UCNACKIFG bit is saved once UCTXSTP is cleared (i.e., stop completed), then all interrupt flags are cleared before finally re-enabling global interrupts.

Is there are reason why this procedure is performed with global interrupts disabled?  That is, could you simply disable the specific I2C interrupt flags (e.g., UCBxTXIE, UCBxRXIE, and all bits in UCBxI2CIE) and leave global interrupts enabled?  Or does the possibility of an intervening unrelated IRQ cause timing problems with the "ping" logic?

It would be good to have global interrupts enabled so that a timer could be used to detect a bus error instead of just waiting forever for the UCTXSTP flag to clear (e.g., I have noted that sometimes the STP condition flag never clears) or having to resort to inserting an arbitrary loop count into the "while (UCBxCTL1 & UCTXSTP);"

Please advise.

  • 0
    TI__Mastermind 26380 points

    Hello,

    Are you referring to any specific TI collateral (it always helps if you list the document title :))

    What you are describing, refered to as 'Acknowledge Polling', wherein the master checks to see if a slave device is available on the bus. In this case you would set the UCTSXTT and the UCTXSTP bits simultaneously and poll for stop completion (UCTXSTP =0).

    There is no reason to disable global interrupts. It is sufficient to disable the I2C ones. In fact I would suggest doing the acknowledge polling with the master configured as a receiver so that the transmit interrupt flag is not set (typically this flag is set for the first time when the slave acknowledges the device address).

    You can always setup a timer to check if UCTXSTP is cleared. A while loop is not required.

    Regards,

    Priya 

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