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MSP430F5437A ADC with MCLK

Hi,

I'm trying to sample 2 channels of analog data the using the ADC.
The goal - start the ADC to sample ALL THE TIME and convert it, read as fast as possible & copy to mem using DMA. 

When I operate the ADC with ACLK everything is OK, when I switch to SMCLK I don't get any sample. 

Below is my code - the line with TASSEL__SMCLK  if I change it to TASSEL__ACLK all works.

  TBCCR0  = 0x2;
  TBCCR1  = 0x1;
  TBCCTL1 = OUTMOD_6; //timer mode6 Toggle/Set (so it will start with 1) this is done to make sure sampling for SHI will arrive on time
  TBCTL   = TBSSEL_2 + MC_1 + TBCLR;        // SMCLK, Up-Mode

  // Setup ADC12 //ADC12RES 8bits, with 
  ADC12CTL0 = ADC12SHT0_0 + ADC12MSC + ADC12ON;// ADC12SHT0_0 - 4 ADC12CLK cycles, ADC12MSC - start on SHI continue automatically, 
  ADC12CTL1 = ADC12SHS_3 + TASSEL__SMCLK  + ADC12SHP + ADC12DIV_0 + ADC12CONSEQ_3; // Use sampling timer;
                     // ADC12SHS_3 - tell ADC to use TB0.1, 
                     // TASSEL__SMCLK  - ADC using SMCLK, !!IF i CHANGE THIS TO TASSEL__ACLK IT WORKS
                     // ADC12SHP       - SAMPCON signal is sourced from the sampling timer
                     // ADC12DIV_0     - ADC12 Clock Divider : devide by 1
                     // ADC12CONSEQ_3  - Repeat-sequence-of-channels
  //PS_INFO: controlling the refrence of the V+,- using REFMSTR   ADC12REF2_5V
  ADC12MCTL0 = ADC12SREF_0 + ADC12INCH_0;   // V+=AVcc V-=AVss, A0 channel
  ADC12MCTL1 = ADC12SREF_0 + ADC12INCH_1 + ADC12EOS;   // V+=AVcc V-=AVss, A1 channel, End of sequence,
  ADC12CTL2  = ADC12TCOFF;  // ADC12 temperature sensor off (power saved mode), 8bit resolution
  ADC12CTL0 |= ADC12ENC;

  // Setup DMA0
  DMACTL0    = DMA0TSEL_24 + DMA1TSEL_24;      // ADC12IFGx triggered
  DMACTL4    = DMARMWDIS;                      // Read-modify-write disable
  // DMA memory channel 0 setup
  DMA0CTL   &= ~DMAIFG;
  DMA0CTL    = DMADT_4 + DMAEN + DMASBDB + DMADSTINCR_3; // Rpt single tranfer, enable ,  source byte & dest is byte, inc dst
  DMA0SZ     = MAX_SAMPLES;                               // DMA0 transfer size (total till loop accures) = 50
  __data16_write_addr((unsigned short) &DMA0SA,(unsigned long) &ADC12MEM0); // ... from ADC12MEM0
  __data16_write_addr((unsigned short) &DMA0DA,(unsigned long) dmaDestA); // ... to destination in RAM
  // DMA memory channel 1 setup
  DMA1CTL   &= ~DMAIFG;
  DMA1CTL    = DMADT_4 + DMAEN + DMASBDB + DMADSTINCR_3; // Rpt single tranfer, enable , source byte & dest is byte, inc dst
  DMA1SZ     = MAX_SAMPLES;                               // DMA0 transfer size (total till loop accures) = 50
  __data16_write_addr((unsigned short) &DMA1SA,(unsigned long) &ADC12MEM1); // ... from ADC12MEM1
  __data16_write_addr((unsigned short) &DMA1DA,(unsigned long) dmaDestB); // ... to destination in RAM

Please advice , since I would like to sample at SMCLK all time but it works only at ACLK.

  • #define TASSEL__SMCLK (2*0x100u) is a define for timer A, which doesn't work (by chance) for the ADC, because the correct #define ADC12SSEL_1 (1*8u), for example, is completely different. You're overwriting the bits for your sequence selection.

  • Michael_M said:
    You're overwriting the bits for your sequence selection.


    Worse: Since the code arithmetically adds the different bits instead of joining them with the bitwise OR operator, the outcome if a wrong define is used or a value is added twice, is almost unpredictable.

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