Hi,
TI provides a sw workaround for this. Here is the description.
A write access to the RTC registers (SEC, MIN, HOUR, DATE, MON, YEAR, DOW) may
result in unexpected results. As a consequence the addressed register might not contain
the written data, or some data can be accidentally written to other RTC registers.
My question is:
1. Only RTC in calendar mode needs the workaround? what about counter mode? The workaround only provides set functions like "SetRTCHOUR", "SetRTCMIN" and "SetRTCSEC", but no functions like "SetRTCTIM0", although they should write to the same registers, simply different for byte or word operation.
2. Even if it has provided read functions "GetRTCTIM0" and "GetRTCTIM1", in order to correctly read RTC count in counter mode, it still needs SW majority check to ensure the result is valid, for example by calling "GetRTCTIM0" twice and think the result is valid only when both returned value are the same? Or, "GetRTCTIM0" will ensure the result will be valid?
Thanks