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MSP430FR5969 UART transmit complete interrupt problem

Other Parts Discussed in Thread: MSP430FR5969

The USCIa1 uart's transmit complete interrupt (UCTXCPT) is interrupting even if the transmit buffer is full, that is, I get the interrupt as each character is shifted out of the shift register.  I've verified an uninterrupted stream of data is being sent, but the transmit complete interrupt happens after each character.  ( This is in IRDA mode, BTW, but that shouldn't matter).

As a work-around I only enable UCTXCPTIE when the transmit ready interrupt occurs after the last character to send has been loaded, but I shouldn't have to go through those gyrations.  Is this a bug in the processor ( I'm testing with MSP430FR5969 Rev. E )?

Thanks.

  • The UCTXCPT interrupt is not very well documented. It is only mentioned in UART mode (where it indeed is described as if it is only set if TXBUF is empty), but it is not mentioned in SPI mode, where it is required to know when to de-assert CS (unless one wants to poll UCBUSY).

    If you are sure it gets triggered on each sent byte (independent of whether TXBUF is empty), then I’d suggest setting UCTXCPTIE in your TX ISR when there’s nothing more to send (and clear TXIE). This also avoids erroneous triggers when there is still data to send but the TX ISR can’t be executed in time.

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