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MSP430F6723: Analyzing Power Leakage When Powered from AUXVCC1

Other Parts Discussed in Thread: MSP430F6723, MSP430F6736

I'm implementing a low-power application with the MSP430F6723 which requires the idle microcontroller to consume < 10uA when powered from AUXVCC1 (RTC and external interrupts wake the processor, otherwise it's idle). This seems like it should be very doable with this part. However, I haven't been able to push the consumption below ~100uA, even when the uC is the only thing connected to that power supply and the uC is in LPM4. This same amount of current is also consumed when the uC is deprogrammed, which makes sense since the uC goes into LPM4 when it has no program.

From my research so far, I have been able to deduce two possible causes internal to the uC for this high consumption:

  • improperly configured GPIO pins
  • some peripherals unexpectedly on

However, I'm feeling a little lost about what the most likely causes could be, how to debug, etc. I have a few related questions:

  • Are there any rules of thumb about the consumption of secondary factors like floating GPIO?
  • Does TI have any guides on the subject of configuring the microcontroller for lowest power consumption?
  • If the peripherals seem like a likely cause, are there any guides listing which peripherals are on by default and thus need to be turned off before entering LPM?

Any other general advice on the process of debugging this would be highly appreciated!

  • Hi Jacob,

    Have you already checked this wiki page: http://processors.wiki.ti.com/index.php/Current_Consumption_Estimation_for_MSP430


    Hope this helps.

    Regards,

    Mo.

  • Hi Jacob,

    I agree, 100uA is definitely too high for true LPM4.  I'd like to look at two things:

    1. You mention that you are waking from either an RTC interrupt or an external IO when in your low power state.  In LPM4, all clocks are off- meaning the RTC would not be clocked.  In LPM3, low-frequency clocks (like the RTC, or ACLK) may be enabled.  Are you using LPM3, LPM4, or one of the LPMx.5 modes (shutdown mode?)

    2.  Are you using a TI EVM with the MSP430F6723 on it, or is this a custom board?  How are you measuring current? What is the power source?  If you are using a TI EVM, would you be able to let me know what pins you are measuring current between?  Sometimes simple things like having and power regulator in the path or an LED adds current consumption.  What are you using to measure current?


    If you let me know your configuration, I can try to reproduce some simple example code that puts the device into LPM3 and LPM4 and verify the currents on known good hardware.  Then I can share that code with you to see if you get the same results.

    You are correct that GPIO pins left floating can add to the power consumption, as floating pins left as high impedance inputs can cause the input pin Schmitt triggers to latch with noise.  The recommended practice is to set all unused pins to output low to prevent this.  The default non-programmed device will leave all IO's as high-impedance inputs (floating).

    Sections 1.5 and 1.6 of the MSP430x5xx/x6xx User's Guide discuss some very basic principles for low power optimization.  You are on the right track with looking at the IO's and the peripheral states.  The fact that the programmed device also draws the same amount of current is what makes me want to look at the hardware and IO configuration first.

    Regards,
    Walter

  • Thanks for the link Mo! I had not found that yet - I'll go through it.

  • Thanks for the quick reply Walter. See answers below.

    Walter Schnoor said:

    1. You mention that you are waking from either an RTC interrupt or an external IO when in your low power state.  In LPM4, all clocks are off- meaning the RTC would not be clocked.  In LPM3, low-frequency clocks (like the RTC, or ACLK) may be enabled.  Are you using LPM3, LPM4, or one of the LPMx.5 modes (shutdown mode?)

    I've been using LPM4 mode, but I believe the power consumption in LPM3 would be acceptable as well. I actually misspoke in my post - the RTC needs to run in low-power mode, but at the moment doesn't need to generate any interrupts. I believe that since the RTC is powered from AUXVCC3 on this part, it will continue running in LPM4. Am I off base there?

    Walter Schnoor said:

    2.  Are you using a TI EVM with the MSP430F6723 on it, or is this a custom board?  How are you measuring current? What is the power source?  If you are using a TI EVM, would you be able to let me know what pins you are measuring current between?  Sometimes simple things like having and power regulator in the path or an LED adds current consumption.  What are you using to measure current?

    I'm using a custom board that we developed in-house. The board normally receives 3.3V power through a switching supply to DVCC and uses a 3V lithium battery to AUXVCC1 for backup. However for prototyping I'm giving 3.3V to AUXVCC1 from a 9V battery through a linear regulator. DVCC is not being powered at all for these tests.

    I'm measuring current by putting a 50-ohm resistor in series with the supply to AUXVCC1 (after the regulator) and examining the voltage drop with an oscilloscope. I have verified that the only connection to that line is the microcontroller AUXVCC1 pin.

    Many of the microcontroller pins have external pull-ups or pull-downs, but the pull-ups are to DVCC, so I believe those pins are effectively floating when the board is powered by AUXVCC1. However, when I tried to make one of these pins an output and set it high, the current actually increased. Any ideas on what might cause this?

    Also I read in another thread that some peripherals in the MSP430 are enabled by default and must be actively disabled to lower power consumption. If this is true, is there any guide on which peripherals these are? Or is it necessary to go through the user manual by hand and check the settings for all peripherals?

    Is it expected that the unprogrammed part would draw more current than the theoretical minimum, or is this most likely a result of our particular hardware configuration?

    Finally (forgive the stream of questions!) is there a rule of thumb on the current draw for input-mode GPIO pins? The datasheet lists leakage of 50nA, but I assume this refers to leakage due to finite input impedance rather than switching of the Schmitt triggers.

    I really appreciate the offer to do a comparative test. I know you won't be able to reproduce our hardware, but if you think running any particular program would be helpful or have any other ideas for testing the power consumption I'd love to hear about it.

  • Hi Jacob,

    I ran through some tests in the lab on an MSP430F6736 (this device is the family superset to your device).  I captured LPM0, LPM3, and LPM4 currents when powered from DVCC/AVCC or from AUXVCC1.  I did not see any differences at the microamp level between DVCC/AVCC and AUXVCC1, and I met or exceeded the datasheet values in each case.  For completeness, I ran an example with the digital IO's all left as high impedance inputs.  In this case, the power consumption went up significantly- to around 150uA in LPM4.  It should be <2uA.  I also found that the current was somewhat unpredictable, and varied depending on whether I hovered my hand over the pins or not.  Upon returning all of the pins to output low, the current again dropped back to 1.5uA as expected.  I do believe that the boot code in the device leaves the IO pins as high-z inputs to protect the device and any other circuitry (this is the default configuration out of reset).

    I recommend that you try setting all of your unused pins to output low, then re-measuring.  For my tests, I used the following simple source.  Note that I set ACLK to be driven from the VLO, not the crystal- as I did not have a crystal on my test board.  Numbers in LPM3 and LPM4 might be a little higher with a 32kHz crystal, but not much.

    #include <msp430.h>

    int main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;               // Stop WDT

        // Setup UCS
        UCSCTL4 = SELA_1;                       // Ensure VLO is ACLK source

        P1OUT = 0x00;
        P2OUT = 0x00;
        P3OUT = 0x00;
        P4OUT = 0x00;
        P5OUT = 0x00;
        P6OUT = 0x00;
        P7OUT = 0x00;
        P8OUT = 0x00;
        P9OUT = 0x00;
        PJOUT = 0x00;

        P1DIR = 0xFF;
        P2DIR = 0xFF;
        P3DIR = 0xFF;
        P4DIR = 0xFF;
        P5DIR = 0xFF;
        P6DIR = 0xFF;
        P7DIR = 0xFF;
        P8DIR = 0xFF;
        P9DIR = 0xFF;
        PJDIR = 0xFF;

        __bis_SR_register(LPM4_bits);           // Enter LPM4
        __no_operation();                       // For debugger
    }

    I am a little concerned about having external pullups to DVCC.  This may not provide the expected operation when DVCC goes down and the device runs off of AUXVCC1.  The IO rails are powered off of DVSYS, which is externally connected to VDSYS (the digital supply rail internally).  I want to check with someone more familiar with the device to determine the best way to handle external pullups. It could be that because DVCC was not connected in your test,  that outputting a logic high voltage onto an IO line caused a voltage to then appear on DVCC through the external pullup on that pin (which was previously unconnected).

    Walter

  • Success! I was able to reduce the current to below 4uA by setting most pins as output low, and eliminating the external pull-ups to DVCC (it might have been lower than 4uA, but the noise on my oscilloscope prevented me from knowing the value below 4uA).

    Thanks again for your help with this Walter!

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