MSP430F6736 supplied by a super capacitor

The BOR is for handling a power on/ power off situation, not for detecting a slowly dying battery.

For supervising the supply voltage during normal operation, there is the SVS module, which allows finer detection steps and can be adjusted to the actual operating mode (the mentioned 1.8V are only good for <8MHz operation).

The SVS provides checking the low-side voltage (Vcore) for the CPU, as well as the high-side voltage (VCC) for both, CPU and peripherals. And can out the MSP into reset if one for these voltages goes below the programmed threshold. Also, there are additional monitors (SVM) which can trigger an interrupt if a threshold is reached (usually a higher one, so your software can act while the supply is still sufficient but not longer at nominal level.

So when the supply falls below the BOR threshold, the SVS should already have acted long before. Also, it is ensured that the SVS will operate (== holding the MSP in reset) until VCC drops below the BOR threshold.

For using the AUX module, the SVM is used. It measures VDSYS, which is the currently active input. So originally, it checks VCC, but once AUX has switched to AUXVCC1 (or 2), it will check AUXVCC1 (or 2).

So SVMH is giving the AUX module a signal if VDSYS is not sufficient. What happens then depends on the AUX configuration. The AUX module has its own monitoring unit which determines whether the voltage son AUXVCCx (and DVCC) are sufficient or not. When a trigger comes from SVMH, the next available AUXVCCx is selected. However, if DVCC rises again, the AUX module will immediately switch back to DVCC.

Note that any BOR event will set the LOCKAUX bit, blocking access to the AUX module registers until cleared.