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ADC12 hang up

george clarkson
Intellectual 830 points

Other Parts Discussed in Thread: CC430F5137

I've been recently having a problem where randomly the ADC routines in my code appears to stop working and hangs up. After messing around with the code I have come up with a theory as to what maybe going wrong, however I was wondering if I could clarify a key point of the theory.


I am running the ADC in "Sequence-of-channels" where it samples 2 channels then interrupts. The first thing that then gets done inside the interrupt (ADC12IFG1) is the line:

ADC12CTL0 |= (ADC12ENC | ADC12SC);

after that I do a few checks and then read the values from ADC12MEM0 and ADC12MEM1.

My theory is that the reading of the conversion values, while the ADC is busy may cause a problem. Is this a likely theory or is it possible I'm barking up the wrong tree. Unfortunately as it is a rare and random bug it will be hard to prove that the bug has disappeared so I need to be able to justify and be confident of whatever fix is implemented.

Edit: I'm using the CC430F5137 chip

  • 0
    Intellectual 530 points

    It appears that your line of code enables the ADC and starts a conversion. Surely you mean disable the ADC

    ADC12CTL0 &= ~ADC12ENC

    Otherwise you may read the conversion result during the conversion you have just triggered!

  • 0 in reply to Steve W
    Intellectual 830 points

    The ADC at the moment the interrupt runs should have finished running and be waiting for ADC12SC to be set. So I don't believe I need to disable it. (although technically the line would be just as valid if it was ADC12CTL0 |=  ADC12SC;


    However my question was that if I have started another conversion before reading the results, could it cause the ADC to hang?

    Also I'm triggering on the final MEM value that is stored, how long do I need to wait before it would be safe to re trigger the ADC again. Looking at the Errata (bug ADC42) it suggests that starting a new conversion before the previous one has finished, can cause the ADC to halt. Could it be possible that there might be a race condition where I might be setting the line ADC12CTL0 |= (ADC12ENC | ADC12SC); before the ADC has correctly moved back to it's Idle state, thus causing the problem mentioned in the errata.

  • 0 in reply to george clarkson
    Intellectual 530 points

    I have no idea about causing the ADC to hang but I understand the process to be

    1. enter ISR.

    2. disable ADC to prevent result corruption.

    3. perform actions, access results etc.

    4. enable ADC (start if required)

    5. exit ISR.

    This process ensures that the ADC is not trying to put conversion results in the results registers while the ADC is updating them. If the ADC is running all bets are off and I would not be surprised if it caused a hang.

  • 0
    Prodigy 160 points

    George,

    See your timing diagram for read and write and you should read after A/D conversion and check the rate of clock and consider delays in your program.

  • 0 in reply to george clarkson
    Guru 227245 points

    I assume the interrupt is triggered on the MEMCTL that contains the EOS bit. In single sequence mode, if EOS is hit and the interrupt is triggered by the result of this conversion, the ADC has stopped. It is safe then to read the results, independently of any other consideration.
    To restart the next sequence, ADC12SC needs to be cleared, before it is set again (it will only auto-clear in single conversion mode). However, some people have reported that setting the (still set) ADC12SC multiple times will also start a new sequence.
    If the next sequence is started before the results have been read, it is possible that the next conversion is already done before you read ADC12MEMx. In this case, you might read an invalid value (might happen when ADC12OSC and MCLK are not synchronized, at the moment of the ADC12MEM update) or the result of the next conversion. It depends on the ADC12CLK and MCLK speeds.

    Since the delay between ending the sequence and starting the next may vary and therefore have a cumulative effect on overall sampling frequency, it is recommended to not start the next sequence inside the ADC12 ISR. Rather do the start in an independent timer ISR (still jitter, but no cumulative effect) or trigger it by a timer directly (no jitter). Or use repeated sequence mode and trigger each individual conversion by a timer (don’t set MSC bit and/or SHP bit). This allows good control over the sampling frequency, while the ADC12 ISR only reads the results.

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