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frequency measurement

Hi,

im trying to measure frequencies using the ADC10 by measuring the period between peaks and taking the inverse of the period*2(for a full wave). 

i am able to measure low frequencies but when trying to measure high frequencies i am missing it because my code is only executing at approx. 5KHz

i have the clock configured as:

DCOCTL = CALDCO_16MHZ; 
BCSCTL1 = CALBC1_16MHZ; 
BCSCTL3 |= LFXT1S_2;

is this the fastest?

my analog is congfigured as

 ADC10AE0 = 0x10; // enable AN0
  ADC10CTL0 = SREF_1 + ADC10SHT_1 + REF2_5V + REFON + ADC10ON + ADC10IE;
  // SREF1: v+ = vref +, v- = avss
  // ADC10SHT_3: t_sample = 64*adc10clks
  // REF2_5V: 2.5v reference
  // REFON: internal reference
  // ADC10ON: module on
  // ADC10IE: interrupt when completed
  ADC10CTL1 = INCH_4 + ADC10DIV_3;
  // INCH_4: an4
  // ADC10DIV_3: adc10clk/4
where i'm measuring the frequency i have this code 
iadcprevious=iAdcValue;
timercounter++;
iAdcValue = (int) (lAdcAccumulator >> ADC_FILTER_SHIFT);
if ((iAdcValue>iadcprevious)&&(time!=1))
{
time=1;
lastfreq=timercounter;
timercounter=0;
}
if ((iAdcValue<iadcprevious)&&(time!=2))
{
time=2;
lastfreq=timercounter;
timercounter=0;
}
if (timercounter>32000)
{
timercounter=0;
}
is there a way i can speed up the code execution or another approach to measure frequencies around 1500Hz-3000Hz?
Thanks,
Steven
  • You don’t write which MSP you use, but it apparently is from 2x family, and IIRC 16Mhz is the top speed there (5xfmaily goes up to 25MHz)

    There are several ways to improve the speed. Depending on your MSP you may use a comparator to detect the rising edge of the signal. Then you  can use the comparator output to trigger a capture interrupt of a timer. The captured timer counts of two rising edges give your period duration. This would (in theory) go as fast as 8MHz.
    You can simplify your test and checks. Use a hardware timer instead of a timercounter variable (saves you the increment)
    You can take advantage from the 16 bit roll-over in your calculations and comparisons.

    However, if the CPU really runs on 16MHz and you can really not detect frequencies >5kHz, then this means you need 3000 MCLK cycles for a proper detection. Which is very much.

    Double--check your ADC configuration, maybe you can do the conversions faster, let it run in continuous mode to save time, use the DTC to store the results instead of reading them manually etc.

  • Hi,

    one of my problems on the msp420g2232 was trying to run my whole program, it's very full, so full i have started to try and re write it to fit.

    right now i am getting approx 90KHz top speed measured with a timer. only 73828Hz when running the whole program.

    this is a lot better then the previous results. i changed the clock divider and used the ADC10 osscilator.

    my question is should i be able to get up and over the 200KHz like the manual suggests without using the DTC?

    if i use the DTC how can i measure the period between my samples? this is why i havent used this yet. i can measure up to 36KHz right now but i enjoy learning and would like to see about going faster.

    Thanks,

    Steven

  • If your signal is going between logic level 0/1 than high frequency (over MCLK) can be measured without ADC.

    http://forum.43oh.com/topic/3317-msp430f550x-based-frequency-meter

  • Hi,

    Thanks i read your thread. unfortunately for me it's an audio signal that is constantly changing. keeping up with it real time is key for me so im trying to see how fast i can get. i can use DTC with continuous ADC measurement but i don't know how to find the exact time between my array values. 

    maybe there is a way to know the exact counts from the adc10OSC and then i can fill an array for a period of time and see total clk to then get the average per sample...?

    thanks,

  • For Audio, 41 or 48kHz should be sufficient (CD/DAT quality). Higher sampling rate doesn't make up for lower resolution, at least not so much that it would matter, and not by just raisijg the sampling rate alone.

    However, with 200kHz sampling rate and 16MHz MCLK, you have 80 MCLK cycles per sample. Which is not much. DTC helps here, but you should not use interrupt to detect end of DTC, but rather do polling of the DTC end:

    Let the DTC do its job, waiting for it to finish, then, while the DTC is doing the next bunch of data, process the already read data (of course it must be fast enough before the DTC has filled the second block of data), then again wait for the DTC.
    Doing it without the DTC is very difficult, because then you’d need not only time for copying the data manually, but also for detecting when each single conversion is done (or you waste time on ISR entry and exit overhead and synchronization) and then still have to process it. Much to do for only 80 clock cycles.

  • Thank you kindly! You are certainly very active on here. I really appreciate your answers

  • steven mylrea said:
    You are certainly very active on here

    --- Understatement warning! ---

    I think one can say so. :)

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