SPI read out problem with MSP430G2553 launchpad

/*
 * SPI Connections:
 * CS   - P1.4 (Active Low)
 * SCLK - P1.5
 * MOSI - P1.7
 * MISO - P1.6
 *
 * 80000 - 50 ms
 */

#include <msp430.h>

//opcodes
#define WREN  	6
#define WRDI  	4
#define RDSR  	5
#define WRSR  	1
#define READ  	3
#define WRITE 	2

#define DLY		16000	//1 MS		//80000	// 5 MS
#define DATA	0x50

char recv_data;


void spi_write(char byte)
{
	UCB0TXBUF = byte;
	while (!( IFG2 & UCB0TXIFG));
}

char spi_read(void)
{
	while (!(IFG2 & UCB0RXIFG));   // USCI_b0 RX Received?
	return(UCB0RXBUF);
}

void write_enable(void)
{
	P1OUT &= ~BIT4;			// Enable Device
	_delay_cycles(DLY);
	spi_write(WREN);
	_delay_cycles(DLY);
	P1OUT |= BIT4;			// Disable Device
}

void write_disable(void)
{
	P1OUT &= ~BIT4;			// Enable Device
	_delay_cycles(DLY);
	spi_write(WRDI);
	_delay_cycles(DLY);
	P1OUT |= BIT4;			// Disable Device
}

void isDeviceReady(void)
{
	unsigned char status;

	P1OUT &= ~BIT4;			// Enable Device

	spi_write(RDSR);
	while((UCB0STAT & UCBUSY));		// Check busy or not

	spi_write(0xFF);

	status = spi_read();

	uart_put(status);
	P1OUT |= BIT4;			// Disable Device

	while(status & 0x01);
}

void eeprom_write(void)
{
	write_enable();

	P1OUT &= ~BIT4;			// Enable Device
	_delay_cycles(DLY);

	spi_write(WRITE);

	spi_write(0x00);		// MSB Address

	spi_write(0xAA);		// LSB Address

	spi_write(DATA);
	while((UCB0STAT & UCBUSY));		// Wait if Transmit process is busy

	_delay_cycles(DLY);
	P1OUT |= BIT4;			// Disable Device

	write_disable();
	_delay_cycles(100);
}

char eeprom_read(void)
{
	char ch = 1;

	P1OUT &= ~BIT4;			// Enable Device
	_delay_cycles(DLY);

	spi_write(READ);

	spi_write(0x00);		// MSB Address

	spi_write(0xAA);		// LSB Address

	spi_write(0xFF);
	while((UCB0STAT & UCBUSY));		// Wait if Transmit process is busy

	ch = spi_read();

	_delay_cycles(DLY);
	P1OUT |= BIT4;			// Disable Device

	return(ch);
}

void clockConfig(void)
{
	// configure the CPU clock (MCLK)
	// to run from DCO @ 16MHz and SMCLK = DCO / 4
	BCSCTL1 = CALBC1_16MHZ; // Set DCO
	DCOCTL = CALDCO_16MHZ;
	BCSCTL2= DIVS_2 + DIVM_0; 	// divider=4 for SMCLK and 1 for MCLK
}

void spi_init(void)
{
	// set the pin mode 3 for pins 5,6 & 7 of port 1 (USCI mode)
	P1SEL |= BIT5 + BIT6 + BIT7; // low bit = 1 for pins 5,6 and 7 BIT 3 is 0 (CS via GPIO)
	P1SEL2 |= BIT5 + BIT6 + BIT7; // high bit = 1 for pins 5,6 and 7 BIT 3 is 0 (CS via GPIO)

	P1DIR |= BIT4; // p1.4 set to output to drive CS
	P1OUT |= BIT4; // pull p1.4 to high - CS high -> chip is disabled

	UCB0CTL1 = UCSWRST;

	// synchronous (=SPI) master 3 wire SPI, clock polarity Low at idle
	// SPI mode 0
	UCB0CTL0 |= UCCKPH | UCMST | UCSYNC | UCMSB | UCMODE_0;

	UCB0CTL1 |= UCSSEL_2; //use SCLK : 4MHz

	// set baud rate = SMCLK, divide by 4, SPI Clock Freq : 1 MHz
	UCB0BR0 = 0x04;
	UCB0BR1 = 0;
	UCB0CTL1 &= ~UCSWRST; // ** Initialize USCI **
}

void uart_init(void)
{
	P1SEL |= RXD + TXD ; // P1.1 = RXD, P1.2=TXD
	P1SEL2 |= RXD + TXD ; // P1.1 = RXD, P1.2=TXD

	UCA0CTL1 = UCSWRST; 	// reset
	UCA0CTL1 |= UCSSEL_2; 	// SMCLK
	UCA0BR0 = 0xA0;			// 9600 baud rate		// 0x08; // 1MHz 115200
	UCA0BR1 = 0x01; 			// 1MHz 9600
	UCA0MCTL = UCBRS2 | UCBRS1;	//UCBRF_1 | UCOS16;	// 9600
	UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
	//UC0IE |= UCA0RXIE; // Enable USCI_A0 RX interrupt
}

void uart_put(char byte)
{
	UCA0TXBUF = byte;
	while (!( IFG2 & UCA0TXIFG));
}

/*
 * main.c
 */
int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;	// Stop watchdog timer

    clockConfig();
    uart_init();
    spi_init();

    // Set LED direction for Debug
    P1DIR |= BIT0;
    P1OUT |= BIT0;

    uart_put('A');

    // Write a byte on specific location
	eeprom_write();

	// Read a byte from specific location
	recv_data = eeprom_read();

	uart_put(recv_data);

	if(recv_data == DATA)	// Check read data is same as written data
	{
		P1OUT &= ~BIT0;
		uart_put('a');
	}
	else if(recv_data == 0x00)
	{
		P1OUT &= ~BIT0;
	}
	else if(recv_data == 0xFF)
	{
		P1OUT |= BIT0;
	}
	else
	{
		P1OUT ^= BIT0;
	}

	while(1);
}