DMA with ADC on FR59xx

Hello 
I have a question about ADC and DMA.

I want to get samples from 2 channels (A3 and A4) save on memory by DMA and after to transfer these data by UART.

void adc_init(){

    // Configure ADC12
    ADC12CTL0 = ADC12SHT0_9 | ADC12MSC | ADC12ON;        // Sampling time, S&H=384, ADC12 on, multiple conversion
    ADC12CTL1 = ADC12SHP | ADC12SSEL_2 | ADC12CONSEQ_3 | ADC12DIV_4;   // Use sampling timer, CLK/5
    ADC12CTL2 = ADC12RES_0;                  // 8-bit conversion results
    ADC12MCTL0 |= ADC12INCH_4;               // A4 ADC input select; Vref=AVCC
//    ADC12IER0 |= ADC12IE0;                    // Enable ADC conv complete interrupt
//    ADC12CTL0 |= ADC12ENC;                    // Enable ADC

}


int main(void)
{
	WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT

	P1OUT &= ~BIT0;
	P1DIR |= BIT0;
	P1DIR |= BIT5;
	P1OUT &= ~ BIT5;

	

	// Configure Uart
	P2SEL1 |= BIT0 | BIT1;                    // USCI_A0 UART operation
	P2SEL0 &= ~(BIT0 | BIT1);

	P1DIR &= ~BIT4;
	P1SEL0 |= BIT4;                           // Configure P1.4 for ADC
	P1SEL1 |= BIT4;

	P1DIR &= ~BIT3;
	P1SEL0 |= BIT3;                           // Configure P1.3 for ADC
	P1SEL1 |= BIT3;

	// Disable the GPIO power-on default high-impedance mode to activate
	// previously configured port settings
	PM5CTL0 &= ~LOCKLPM5;

    set_MCU_frequency(DCO_16MHz);

    adc_init();

    uart_init();

  // Configure DMA (ADC10IFG trigger)
   P1OUT |= BIT5;
   DMACTL0 = DMA0TSEL__ADC12IFG;            // ADC10IFG trigger
  __data16_write_addr((unsigned short) &DMA0SA,(unsigned long) &ADC12MEM0);
                                            // Source single address
  __data16_write_addr((unsigned short) &DMA0DA,(unsigned long) &audio[0]);
                                            // Destination array address
  DMA0SZ = 16000;                            // 32 conversions
  DMA0CTL = DMADT_4 + DMADSTINCR_3 + DMAEN + DMAIE + DMASRCBYTE + DMADSTBYTE;
                                            // Rpt, inc dest, word access,
                                            // enable int after 30000 conversions

//  while(1)
  {
//	P1OUT |= BIT3;
	P1OUT |= BIT5;
    while (ADC12CTL1 & BIT0);               // Wait if ADC12 core is active
    ADC12CTL0 |= ADC12ENC + ADC12SC;        // Start sampling

    __bis_SR_register(CPUOFF + GIE);        // LPM0, ADC10_ISR will force exit
    __no_operation();                       // << SET BREAKPOINT HERE
//    P1OUT &= ~ BIT3;
//    __delay_cycles(5000);                   // Delay between conversions
    P1OUT ^= BIT5;
    DMA0CTL &= ~(DMAEN + DMAIE);
    UCA0CTLW0 &= ~UCSWRST;                   // Initialize eUSCI

    uart_write(audio, 16000);

    P1OUT ^= BIT5;

  }
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=DMA_VECTOR
__interrupt void DMA0_ISR (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(DMA_VECTOR))) DMA0_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(DMAIV,16))
  {
    case  0: break;                          // No interrupt
    case  2:
      // 40690 conversions complete
//     P1OUT |= BIT0;

      ADC12CTL0 &= ~ADC12ENC;
     // DMA0CTL &= ~DMAEN;
      __bic_SR_register_on_exit(CPUOFF);     // exit LPM
      break;                                 // DMA0IFG
    case  4: break;                          // DMA1IFG
    case  6: break;                          // DMA2IFG
    case  8: break;                          // Reserved
    case 10: break;                          // Reserved
    case 12: break;                          // Reserved
    case 14: break;                          // Reserved
    case 16: break;                          // Reserved
    default: break;
  }
}

The goal is to receive 8000 sample from channel 3 and the other 8000 sample from channel 4.

 Actually I'm getting the same data replicated.  
What i'm missing on this...

Regards